S32K312 uart AsyncReceive callback event is always error when SPI DMA transfer mass data

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S32K312 uart AsyncReceive callback event is always error when SPI DMA transfer mass data

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gan89557
Contributor I

Hello, 

S32K312 S32DS3.5 RTD4.0.0 project, SPI0 and SPI1 work with DMA mode, and UART1 work with Interrupt mode.

UART1 work well when sync send or async receive a frame  of 12 bytes.

But uart AsyncReceive callback event is always error when SPI DMA transfer mass data.

Any suggestion?

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2 Replies

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gan89557
Contributor I

Yes, It is the Interrupt Priority Issue, Uart1 works after Raising it's Priority.

Thanks so much!

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

there can be below possible reasons for UART Async Receive Errors during SPI DMA bursts:

1. Interrupt Priority Issue

- UART RX interrupt is not serviced quickly because DMA completion or other ISRs have equal or higher priority.
- Result: UART RX FIFO overflows → overrun or framing error.

Ensure LPUART1_IRQn has higher priority (numerically lower) than all DMA-related IRQs (e.g., DMATCDx_IRQn). Confirm interrupt grouping allows preemption.

2. Bus Occupation by DMA

- eDMA channels for SPI can saturate the AXBS crossbar during large bursts.
- CPU and peripheral register accesses (including UART RX handling) are delayed, increasing ISR latency.

Configure SPI DMA channels to allow eDMA engine stalls (BWC setting)
 
BR, Petr

 

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