S32K312 Multi ADC channel with DMA

[BrK_]

Hi, 

I want to read 5 ADC channels. Two of them are ADC-0 and the other three are ADC-1 channels. And I want to save the conversions to the buffer I provided with dma. However, BCTU cannot run dma.

Let me briefly explain what I did.

I configured ADC-0 and ADC-1:

And also i configured related channels

ADC-0:

ADC-1:

BCTU configurations:

TRGMUX and PIT configurations:

DMA configurations:

Even though I made all these configurations, no data is written to the buffer I gave to DMA.

When I check FIFODR1 with debug, I see the data, but FIFO does not run DMA for some reason.

When I reviewed the driver functions, I saw that bctu turns off the DMA hardware request every time the transfer ends in DMA configurations.

To prevent this, the function named Bctu_Ip_FifoDmaHandler is called within the Bctu_Ip_Bctu0Fifo1DmaComplete function. Thus, the DMA hardware request is refreshed.

What I want to ask here is who calls the Bctu_Ip_Bctu0Fifo1DmaComplete function and when. Could it be related to my problem?

What am I missing so that DMA can work and an interrupt occurs in the DMA major loop?

[PetrS]

Hi

if you perform parallel conversions, in your case trigger 2 ADCs per single BCTU trigger, then you have to config list to have 2, 4, 6, ... items. Then set DMA transfer accordingly.

What is the S32DS and RTD version you are using?

BR, Petr 

[BrK_]

Hi @PetrS,

RTD version: 3.0.0 and S32DS version: 3.5

So even if I have 5 channels, I must also configure the 6th channel for it to work properly, am I right?.

BCTU makes the DMA transfer configurations, do I need to do it again manually?

[PetrS]

Hi,

yes, you should have 6 channels in BCTU list.
Not sure in RTD3.0.0 but in previous DMA must be configured manually.
Let me create some project in RTD3.0.0 to meet your config.

BR, Petr 

[BrK_]

Hi @PetrS ,

Is there any news from the BCTU DMA side.

BR.

[PetrS]

Hi,

per my understanding as BCTU configures the DMA TDC for specified channel and make DREQ cleared, as you wrote, you will need to enable DMA channel interrupt in code, and put Bctu_Ip_Bctu0Fifo1DmaComplete as interrupt callback within DMA setting. 

BR, Petr

[BrK_]

Hi @PetrS ,

When I tried to debug mode, I got a Source Bus Error in the eDMA ES (error status) register.

Does it need permission to access the SRAM of the DMA module? If it has how can I do that?

[PetrS · Accepted solution]

Hi,

did you call BCTU init after DMA init? BCTU init configures selected DMA ch TCD, so it can be cleared by DMA init.
I posted working example at https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-PIT-BTCU-parallel-ADC-FIFO-DMA-DS3-...
Hope it helps.

BR, Petr

[BrK_]

Hi @PetrS ,

I tried this way, but I still couldn't run the dma major interrupt. Have you tried this, and if so can you share an example?