S32K3 ECC error detection

[DGB]

Hi,

I have a question in terms of single/double-bit error detection. Taking into account following statement from S32K3 RM my understanding is that for DFLASH and PFLASH there is possibility to detect only double bit failure, since single bit errors are automatically corrected. Is this correct understanding?  

DGB_0-1733819222203.png

What registers should be taken into account in order to detect double-bit errors for DFLASH and PFLASH?

[DGB]

Thank you for the response. So in order to detect any single or double bit errors  on DFLASH and PFLASH it would be sufficient to pull MCRS[SBC] and MCRS[EER] values periodically during runtime? 

[danielmartynek]

Hi @DGB,

This is question on functional safety.

Refer to the S32K3xx Safety Manual or ask in the SafeAssure community

https://community.nxp.com/t5/SafeAssure-Community/gh-p/52177

Regards,

Daniel

[danielmartynek]

Hi @DGB,

The Error Reporting Module (ERM) can detect single-bit errors on the Flash memory too.

danielmartynek_0-1733907048737.png

And the Embedded Flash Memory (c40asf) also informs about single-bit errors.

Module Configuration Status (MCRS[SBC]).

danielmartynek_1-1733907130872.png

Regards,

Daniel