S32K148 adc not working

[guochuan]

Our project uses S32K148 ADC0 and ADC1, and each ADC is configured with 8 channels. The test found that the last three channels could not obtain data.

guochuan_0-1681457159236.png

[Nhi_Nguyen]

Hi guochuan,

I think the problem can come from this parameter is so small to convert data on all channels. So, you can try to adjust it.

Nhi_Nguyen_0-1682405950808.png

This is its description

Nhi_Nguyen_1-1682406052209.png

For example:

ADC's clock frequency is 40 MHz and prescaler value for frequency is 1.

Nhi_Nguyen_2-1682406118434.png

Nhi_Nguyen_6-1682406718717.png

PDB's clock frequency is 80MHz get from SYS_CLK

Follow to above expression for 1 ADC's channel: "ADC TOTAL CONVERSION TIME = Sample Phase Time (set by SMPLTS+1) + Hold Phase (1 ADC Cycle) + Compare Phase Time (8-bit Mode=20 ADC Cycles, 10-bit Mode=24 ADC Cycles,
12-bit Mode=28 ADC Cycles) + Single or First continuous time adder (5 ADC cycles + 5 bus clock cycles)."

SMPLTS: 

Nhi_Nguyen_3-1682406313533.png

I used 12 bit Mode.

In my case, ADC cycle = Bus cycle.

ADC TOTAL CONVERSION TIME = (255 + 1) + 1 + 28 + 10 = 295.

I have this parameter:

Nhi_Nguyen_4-1682406519940.pngNhi_Nguyen_5-1682406537209.png

So, I have: ADC TOTAL CONVERSION TIME  = 295 * 8 * 8 (channels) =  18880 (cycles)

This parameter Adc Delay Next PDB (0 -> 65535) have to ensure enough time to convert all pre-triggers in channel 0 and this value will be written as counter of PDB. So, we need to convert to PDB's cycles before write it into the register.

 (18880/ 40 * 80 = 37760)

Adc Delay Next PDB (0 -> 65535) have to configure bigger than 37760.

Best regards,

Nhi

[guochuan]

HI NXP team

Our project uses S32K148 ADC0 and ADC1, and each ADC is configured with 11 channels. The test found that the last three channels could not obtain data.