S32K148 SPI driver

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S32K148 SPI driver

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Saitej
Contributor III

Hello NXP

Here am with S32K148 and using process expert configuration for spi and it is working fine as expected for my use case, but I have a situation where i need to do the spi transfer before the RTOS get started

In the situation am in need of blocking call, where I believe "SPI_MasterTransfer()" function from PAL drivers is not using any RTOS functions & if I use this function and a blocking loop for transaction to be completed in back ground, but cursor stay's in loop itself & IRQ function is never called and so call back function is never called.

Do we have any SPI driver without OS dependency, may be bare metal drivers. 

please do the needful.  

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15 Replies

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Saitej,

Sorry for my delay!
Have you tried to use S32SDK S32K1xx RTM 4.0.1? It did not use Processor Expert.

In addition, there is an bare metal example of SPI in S32K1xx development package. You need to install S32K1xx development package in S32 Design Studio for ARM Version 2.2.

S32K148_Project_LPSPI.pngS32K148_Project_LPSPI example.pngS32K1xx development package.png

Best Regards,
Robin
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Saitej
Contributor III

Hello @Robin_Shen 

Thanks for the replay , sorry for confusing with my wordings in previous post , actually here am already using PAL driver & they are serving my purpose, now am in situation where i need to reuse same drivers before RTOS get started right after PIN_DRV_INIT().

here below is my code snippet

static uint8_t TxData_au8[2U] = { 0x01, 0x02 };
static uint8_t RxData_au8[2u];
static boolean SPI_Transfer_CompFlag;
static void SBC_Test(void)
{
    SPI_MasterInit(&SPI_PERIInstance, &SPI_PERI_MasterConfig);
    INT_SYS_SetPriority(g_lpspiIrqId[SPI_PERIInstance.instIdx], 0);
     if(STATUS_SUCCESS == SPI_MasterTransfer(&SPI_PERIInstance,TxData_au8,RxData_au8,1))
     {
           while (false == SPI_Transfer_CompFlag);
            return RxData_au8;      
     }
}
void SPI1_TxRxTransferCompleteCB(void *driverState, spi_event_t event, void *userData)
{
SPI_Transfer_CompFlag = true;
}

The reason for using SPI_MasterTransfer() as a blocking call since it not using any RTOS functions, as you see in my code snippet it is working fine as expected when I set priority to 0 and for other priorities(default or 1) it won't coming to call back function.

below are the screen shots of the NVIC registers which says other interrupts are not set yet.

priority 0priority 0priority 1priority 1

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

The lower priority number, the higher priority level. But the value of NVIC shows there are no other interrupts.

Another strange thing is that why the value of IER SPI1 are different when just change priority 0 to priority 1.

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Saitej
Contributor III

@Robin_Shen 

do you have any other comments .. please help me out !

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338 Views
Saitej
Contributor III

Hello @Robin_Shen 

That's my question even though I see same register contents by setting priority to 1 or 0, why only priority 0 is working.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Sorry to keep you waiting!
I was on vacation recently and just back to the office.
Have you check the value of Interrupt Priority Register?
INT_SYS_SetPriority(LPSPI1_IRQn, 1); I can see the value be set in Interrupt Priority Register of LPSPI1.

INT_SYS_SetPriority(LPSPI1_IRQn, 1);.pngS32K1xx_DMA_Interrupt_mapping.png

Would you please attached the simplified test program? So that I can test directly. 

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Vijay_Arwapally
Contributor III

@Robin_Shen 

I am not able to reproduce this issue with example project. But this happens with actual project that we are working on.

Below are content of SPI register and NVIC registers. SPI register have Interrupt enabled, and from NVIC as well, it is evident that interrupt (LPSPI1 i.e. IRQ 27 is pending) but still IRQ handler isnt invoked.

SPI Registers:

Vijay_Arwapally_0-1613642226113.png

Since the IER register content has interrupts enabled, as SR also indicates TDF bit set, which should trigger IRQ, but that doesnt happen, no clue why.

Status of NVIC registers at this point:

As shown below, IRQ 27 is enabled and is pending.

Vijay_Arwapally_1-1613642328529.png

Priority Registers:

Vijay_Arwapally_2-1613642389154.png

Vijay_Arwapally_3-1613642405380.png

 

Vijay_Arwapally_4-1613642418507.png

 

Vijay_Arwapally_5-1613642437424.png

 

Vijay_Arwapally_6-1613642448369.png

 

 

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

Please check if you configure the BASEPRI 

BASEPRI.png

If you can send your project to me, it would be better to check issue.

 

 

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Vijay_Arwapally
Contributor III

BASEPRI is not configured. Sharing the project may not be possible.

Vijay_Arwapally_0-1613972303872.png

 

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Vijay_Arwapally
Contributor III

@Robin_Shen @nxp  Kindly expedite this issue ASAP. This issue is open since long time.

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302 Views
Saitej
Contributor III

Hello @Robin_Shen 

are you able to replicate the situation ?

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332 Views
Saitej
Contributor III

any update please 

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364 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

Have you tried to use SPI_MasterTransferBlocking? This function initializes a blocking master transfer with time-out.

SPI_MasterTransferBlocking.png

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Saitej
Contributor III

Yes, story started over their , as TransferBlocking function call uses time out but here RTOS is not started yet so it throwing errors. 

I believe blocking call will not work before RTOS get started

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395 Views
Saitej
Contributor III

@danielmartynek 

Any update

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