I have written the following code. With this I am able to read ID of FLASH chip using LPSPI_DRV_MasterTransferBlocking function.
I also tried to use EDMA_DRV_ConfigSingleBlockTransfer function to do the same but with this I am not able to read the received data from FLASH chip, although on scope I can verify correct data is received from external FLASH in both case.
What should be done so that I can receive data using EDMA_DRV_ConfigSingleBlockTransfer function. I have noticed that clock pulses are only output when data is sent to external flash i.e. in TX mode. In RX mode no clock is sent so I have sent dummy 3-byte data to receive 3 bytes of data from FLASH. But I believe I should send 1 byte data in TX and receive 3byte data in RX if using EDMA driver. Let me know what I am doing wrong here.
#include "Cpu.h"
volatile int exit_code = 0;
uint32_t JEDEC_ID;
uint32_t JEDEC_DMA_ID;
uint64_t UNIQUE_ID;
uint8_t SendData[10];
uint8_t ReceiveData[10];
uint8_t ReceiveDataDMA[10];
uint8_t TxDataSize;
/* User includes (#include below this line is not maintained by Processor Expert) */
#define TIMEOUT 10
int main(void)
{
/* Processor Expert internal initialization */
#ifdef PEX_RTOS_INIT
PEX_RTOS_INIT();
#endif
/* Clock and Pin Initialization */
CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);
PINS_DRV_Init(NUM_OF_CONFIGURED_PINS, g_pin_mux_InitConfigArr);
EDMA_DRV_Init(&dmaController1_State, &dmaController1_InitConfig0, edmaChnStateArray, edmaChnConfigArray, EDMA_CONFIGURED_CHANNELS_COUNT);
/* Initialize LPSPI2 */
LPSPI_DRV_MasterInit(LPSPICOM2, &lpspiCom2State, &lpspiCom2_MasterConfig0);
LPSPI_DRV_MasterSetDelay(LPSPICOM2, 1, 1, 1);
JEDEC_ID = 0;
JEDEC_DMA_ID = 0;
/* Send command 0x9F to read status */
SendData[0] = 0x9F;
SendData[1] = 0xFF;
SendData[2] = 0xFF;
SendData[3] = 0xFF;
TxDataSize = 0x04;
LPSPI_DRV_MasterTransferBlocking(LPSPICOM2, &SendData, &ReceiveData, TxDataSize, TIMEOUT);
JEDEC_ID = ((ReceiveData[1] << 16) | (ReceiveData[2] << | (ReceiveData[3]));
/* Configure DMA for the next transfer */
EDMA_DRV_ConfigSingleBlockTransfer(EDMA_CHN1_NUMBER, EDMA_TRANSFER_MEM2PERIPH, SendData,
(uint32_t)&(LPSPI2->TDR), EDMA_TRANSFER_SIZE_1B, 4);
EDMA_DRV_ConfigSingleBlockTransfer(EDMA_CHN0_NUMBER, EDMA_TRANSFER_PERIPH2MEM, (uint32_t)&(LPSPI2->RDR),
ReceiveDataDMA, EDMA_TRANSFER_SIZE_1B, 3);
/* Start the SPI transfer using DMA */
EDMA_DRV_TriggerSwRequest(EDMA_CHN1_NUMBER); // Trigger the DMA to start sending the command
EDMA_DRV_TriggerSwRequest(EDMA_CHN0_NUMBER); // Trigger the DMA to start receiving the data
OSIF_TimeDelay(100); // mS Delay
while (1);
/* RTOS startup code */
#ifdef PEX_RTOS_START
PEX_RTOS_START();
#endif
for (;;)
{
if (exit_code != 0)
{
break;
}
}
return exit_code;
}