S32K144 CAN 2.0 sample code

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K144 CAN 2.0 sample code

1,258 Views
pratayay123
Contributor III

Hello all,

I am using S32K144 eval board.

I want to create a workspace for normal can communication with baud rate as 500kbps.

I need sample code for CAN 2.0 for s32k144 ,if any application note is there for can 2.0 in s32k144 also share that too.

Any leads are appreciated.

Thanks.

Tags (3)
0 Kudos
5 Replies

1,250 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

you can refer to demo examples in S32DS 2.2

PetrS_1-1653046646455.png

This example follows https://www.nxp.com/docs/en/application-note/AN5413.pdf code, see chapter 2.9.

There is also SDK based demo

PetrS_0-1653046631024.png

Similar SDK example is also in S32DS3.4

PetrS_2-1653046755626.png

BR, Petr

0 Kudos

1,244 Views
pratayay123
Contributor III

Thanks! peter for the prompt response.

 

I have imported the project but it seems the code has the CAN FD feature enabled what to do to disable it completely from the code such that it can work for normal CAN 2.0 communication with payload 8byte.

 

Thanks.

0 Kudos

1,203 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

CAN FD is disabled by clearing MCR[FDEN] bit. In SDK it is done by unchecking "Enable FD" option in flexcan component.

PetrS_0-1653374666742.png

Anyway , even if CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats.

BR, Petr

0 Kudos

1,191 Views
pratayay123
Contributor III

Hi PeterS,

Thanks for the response.

I am using s32k144 with 20 MHz crystal.

I wanted to know can bit time setting for 500KHz , and ctrl setting as per below snap for the same sample code,sys clk selected is 80Mhz

pratayay123_0-1653462873490.png

so what should i set for below register in the sample code such that the can communication can take place for 8Mhz Sclock (derived from above CTRL1 register setting) and 500KHz bitrate for Can communication.

pratayay123_1-1653463124384.png

In canpal flexcan sample code , i have done below changes , .enablefd=false, .length = 8, payload selected as 8byte and disabled the FEATURE_CAN_HAS_FD macro in the code.

Please let me know if any other register value needs to be updated for standard CAN changes and also confirm the CAN bite setting for register phaseSeg1, phaseSeg2,predivider,propSeg and rJumpwidth.

 

Thanks.

0 Kudos

1,183 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

if using SDK do not modify driver code, rather do a setting in PE components

PetrS_0-1653480374313.png

You can disable CAN FD, select PE clock source, and change desired Bitrate and sampling point. Bit timing segment will be calculated.

BR, Petr

0 Kudos