Issue with IPCF-(S32k358) Initialization on Power Cycle (Dual-Core Setup)

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Issue with IPCF-(S32k358) Initialization on Power Cycle (Dual-Core Setup)

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GaneshBhagwat
Contributor IV

 

Issue with IPCF Initialization on Power Cycle (Dual-Core Setup)

I am using IPCF to share memory between the two cores. For basic validation, I have two functionalities running:

  • Core 0: LED Blinking
  • Core 2: PWM generation via eMIOS

Both cores are configured to run IPCF correctly. When I run the system in debug mode, everything works as expected — LED blinking and PWM both function properly. However, when I perform a power cycle (turn the board off and on), nothing executes — neither the LED blinks nor the PWM works.

Here’s what I have tried so far:

 

 

  • Added a delay in Core 2 to avoid any race condition during IPCF initialization.
  • Tested the system without IPCF: After removing IPCF, everything works fine, even after a power cycle and in debug mode. This confirms that IPCF is related to the issue.

 

 

  1. Narrowed down the issue to this line:
    ipc_shm_init(&ipcf_shm_instances_cfg);

    Anything placed after this function call does not execute on a power cycle.

 

 

  • Tried clearing shared memory before use, suspecting residual data might be causing the problem. However, when I include memory clearing, the system again fails to work after power-up (though it still works in debug mode).

 

Here’s how I clear the shared memory:

#define IPCF_LOCAL_MEM_ADDR   ((void *)0x20480000U)
#define IPCF_REMOTE_MEM_ADDR  ((void *)0x20482000U)
#define IPCF_MEM_SIZE         (0x2000U)

void clear_ipcf_shared_memory(void)
{
    memset(IPCF_LOCAL_MEM_ADDR, 0, IPCF_MEM_SIZE);
    memset(IPCF_REMOTE_MEM_ADDR, 0, IPCF_MEM_SIZE);
}
Can you please help me resolve this issue? I have also shared the working project files for reference.

Thanks 

Ganesh Bhagwat

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1 Solution
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GaneshBhagwat
Contributor IV

Hi Daniel,

Thank you for your guidance. Upon further investigation, I discovered that the startup_cm7.s file includes a section for initializing the shared memory, but it is conditionally compiled under #if defined(MULTIPLE_CORE) && defined(MULTIPLE_IMAGE). By updating the assembler preprocessors to include these definitions, I was able to resolve the issue, and the IPCF initialization now works correctly even after a power cycle. Please see the attached images for reference.

I appreciate your assistance!

Best regards,
Ganesh Bhagwat

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @GaneshBhagwat,

When you attach the debugger back (without reset), is it stuck in a look in ipc_shm_init() or is there a fault exception?

 

 

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GaneshBhagwat
Contributor IV

Hi Daniel,

Thank you for your quick response.

I checked again as you suggested. When I reattach the debugger without a reset, the code goes into a HardFault inside the function void clear_ipcf_shared_memory(void).

However, if I comment out the call to clear_ipcf_shared_memory(), it still results in a HardFault, this time inside ipc_shm_init().

I have attached screenshots of both HardFault scenarios for your reference.
Could you please help me understand what might be causing these faults and guide me on how to resolve the issue?

Best regards,
Ganesh Bhagwat

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @GaneshBhagwat,

It’s possible that the issue is caused by uninitialized SRAM ECC.

Typically, SRAM ECC is initialized by the debugger. If the debugger is not used, the application must handle ECC initialization in the startup code. Failing to do so can lead to ECC faults when accessing uninitialized memory.

To verify this, try checking the memory at address 0x20482008 (BFAR value of the precise bus fault) in the memory view. Do you see ?? at that address?
If so, it likely indicates an ECC fault due to uninitialized memory.

 

Regards,

Daniel

 

 

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GaneshBhagwat
Contributor IV

Hi Daniel,

Thanks again for your quick response.

I've attached the memory view screenshots for your reference—one taken right after starting the debugger, and another captured after a power cycle when the HardFault occurs. The address 0x20482008 does not show ??, but I noticed that the values at this location are different between the debugger session and after the power cycle.

Thanks again for your continued support.

Best regards,
Ganesh Bhagwat

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GaneshBhagwat
Contributor IV
Could you please let me know where I can find detailed documentation or examples on how to implement ECC initialization correctly in the startup code?

Also, besides ECC-related issues, are there any other common causes that could lead to similar HardFaults after a power cycle?
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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @GaneshBhagwat,

Regarding documentation of SRAM ECC, there is just the S32K3xx reference manual and this AN13388: https://www.nxp.com/webapp/Download?colCode=AN13388

However, you can refer to any RTD example project.

The SRAM ECC is initialized in the startup code.

danielmartynek_0-1752577890061.png

 

Regards,

Daniel

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GaneshBhagwat
Contributor IV

Hi Daniel,

Thank you for your guidance. Upon further investigation, I discovered that the startup_cm7.s file includes a section for initializing the shared memory, but it is conditionally compiled under #if defined(MULTIPLE_CORE) && defined(MULTIPLE_IMAGE). By updating the assembler preprocessors to include these definitions, I was able to resolve the issue, and the IPCF initialization now works correctly even after a power cycle. Please see the attached images for reference.

I appreciate your assistance!

Best regards,
Ganesh Bhagwat

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GaneshBhagwat
Contributor IV
also tried clearing the shared memory using memset on the IPCF configured addresses like this:

memset((void *)ipcf_shm_instances_cfg.shm_cfg[0].local_shm_addr, 0, (size_t)ipcf_shm_instances_cfg.shm_cfg[0].shm_size);
memset((void *)ipcf_shm_instances_cfg.shm_cfg[0].remote_shm_addr, 0, (size_t)ipcf_shm_instances_cfg.shm_cfg[0].shm_size);

But unfortunately, that didn’t resolve the issue either.
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