How to turn on PLL LOL function?

[li3]

Hi NXP，

1. What are the functions of RUNSW.MBSWPLLEN and RUNSW.LBSWPLLEN in the manual?

2. What is the relationship between RUNSW.MBSWPLLEN and RUNSW.LBSWPLLEN and PLL LOL?

3. How to configure PLL LOL?

Best regards,

Li 3.

[VaneB]

Hi @li3 

For information on the relationship between RUNSW[LBSWPLLEN] and RUNSW[MBSWPLLEN] with PLL LOL, refer section 54.9.6 of the S32K3xx Reference Manual, Rev. 9, bit 20 (LOCKESW) of the ERR_STAT register.

About PLL LOL configuration, my coworker is already helping you in this thread.

BR, VaneB

[li3]

Hi NXP，

1.According to the manual, LOL can only be used in PLL functional mode, so PLL is configured to automatically open LOL in functional mode?

2.Will LOL turn on automatically after PLL is configured to function? I want to know how to turn on the LOL function.

3.Is PLL enabled, PLL register configured, LOL enabled to provide interfaces? Where is the interface provided in the project?

Best regards,

Li 3.

[VaneB]

Hi @li3 

No configuration is required to enable LOL functionality. Each PLL on the chip includes a lock-status that is continuously monitored to report Loss of Lock (LOL) condition (a fault
has occurred). A fault occurs when a PLL clock is outside the range of correct operating conditions (PLL source frequency limits are provided in the S32K3xx Data Sheet, Rev. 10).

As for the interrupt, as my coworker mentioned, you need to set field DEST_RST9_AS_IPI to 1 (of register DCMRWP3) to configure a destructive reset to interrupt. Refer to section 31.4.2.2
(Destructive reset event bypass) of the S32K3xx Reference Manual, Rev. 9.

[li3]

Hi NXP，

1. What are the three PLL clock modes? What's the difference?

2. Are there any differences in the LOL monitoring methods corresponding to these three PLL clock modes?

Best regards,

Li 3.

[VaneB]

Hi @li3 

1. Depending on the configured PLL operating mode, will be determine the relationship between fVCO and PLL reference frequency. Refer to section 30.3.3 (Clock configuration) of the chip's reference manual.

2. As previously said, a Loss of Lock (LOL) condition occurs when a PLL clock is outside the range of correct operating conditions. Therefore, you should only not violate the maximum system clock frequency or maximum and minimum VCO frequency specification of PLL.

[li3]

Hi NXP,

1. What is the frequency range for the three PLL clock modes to LOL?

2. After LOL is configured as an interrupt, how to configure the interrupt in the program? Is the callback function generated automatically?

Best regards,

Li 3

[VaneB]

Hi @li3 

1. PLL source frequency limits are independent of the operating mode. Refer to section 11.3 (PLL) of the S32K3xx Data Sheet, Rev. 10.

2. If you are using RTD, the PLL LOL interrupt is defined as SoC_PLL_IRQn.

[li3]

Add a sixth question: if LOL is incorrectly configured as an interrupt, where is the interrupt function? How to configure interrupt module?

[li3]

Two more questions remain: What is the PLL frequency above which an LOL event is triggered? Can this error range be set?