I have found a solution, I disabled the cell 5 to 11 fault detection.
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT14_OFFSET, MC33771C_TH_CT14_CT_UV_TH_MASK, MC33771C_TH_CT14_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT13_OFFSET, MC33771C_TH_CT13_CT_UV_TH_MASK, MC33771C_TH_CT13_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT12_OFFSET, MC33771C_TH_CT12_CT_UV_TH_MASK, MC33771C_TH_CT12_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT11_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT11_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT10_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT10_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT9_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT9_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT8_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT8_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT7_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT7_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT6_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT6_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT5_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT5_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT4_OFFSET, MC33771C_TH_CT4_CT_UV_TH_MASK, MC33771C_TH_CT4_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT3_OFFSET, MC33771C_TH_CT3_CT_UV_TH_MASK, MC33771C_TH_CT3_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT2_OFFSET, MC33771C_TH_CT2_CT_UV_TH_MASK, MC33771C_TH_CT2_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT1_OFFSET, MC33771C_TH_CT1_CT_UV_TH_MASK, MC33771C_TH_CT1_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));