I am current use 7 cells to test the board. I have successfully monitor the voltage and current. But the fault register has a problem. I have configured the overvoltage threshold and undervoltage threshold to 2800mV and 4200mV. drvCfg:
drvConfig.drvInstance = 0U;
drvConfig.commMode = BCC_MODE_SPI;
drvConfig.devicesCnt = 1U;
drvConfig.device[0] = BCC_DEVICE_MC33771C;
drvConfig.cellCnt[0] = 7U;
drvConfig.loopBack = false;
But when I check the registers, the fault register for 5 to 11 cells are undervoltage. How should I solve this?
Codes for reading the fault registers:
error = BCC_Fault_GetStatus(&drvConfig, BCC_CID_DEV1, faultStatus);
if (error != BCC_STATUS_SUCCESS)
{
return error;
}
faultStatusValue[0] = faultStatus[BCC_FS_CELL_OV];
faultStatusValue[1] = faultStatus[BCC_FS_CELL_UV];
return BCC_STATUS_SUCCESS;
Solved! Go to Solution.
I have found a solution, I disabled the cell 5 to 11 fault detection.
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT14_OFFSET, MC33771C_TH_CT14_CT_UV_TH_MASK, MC33771C_TH_CT14_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT13_OFFSET, MC33771C_TH_CT13_CT_UV_TH_MASK, MC33771C_TH_CT13_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT12_OFFSET, MC33771C_TH_CT12_CT_UV_TH_MASK, MC33771C_TH_CT12_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT11_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT11_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT10_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT10_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT9_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT9_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT8_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT8_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT7_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT7_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT6_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT6_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT5_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT5_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT4_OFFSET, MC33771C_TH_CT4_CT_UV_TH_MASK, MC33771C_TH_CT4_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT3_OFFSET, MC33771C_TH_CT3_CT_UV_TH_MASK, MC33771C_TH_CT3_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT2_OFFSET, MC33771C_TH_CT2_CT_UV_TH_MASK, MC33771C_TH_CT2_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT1_OFFSET, MC33771C_TH_CT1_CT_UV_TH_MASK, MC33771C_TH_CT1_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
I have found a solution, I disabled the cell 5 to 11 fault detection.
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT14_OFFSET, MC33771C_TH_CT14_CT_UV_TH_MASK, MC33771C_TH_CT14_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT13_OFFSET, MC33771C_TH_CT13_CT_UV_TH_MASK, MC33771C_TH_CT13_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT12_OFFSET, MC33771C_TH_CT12_CT_UV_TH_MASK, MC33771C_TH_CT12_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT11_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT11_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT10_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT10_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT9_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT9_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT8_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT8_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT7_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT7_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT6_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT6_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_OV_UV_EN_OFFSET, MC33771C_OV_UV_EN_CT5_OVUV_EN_MASK, MC33771C_OV_UV_EN_CT5_OVUV_EN_DISABLED_ENUM_VAL);
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT4_OFFSET, MC33771C_TH_CT4_CT_UV_TH_MASK, MC33771C_TH_CT4_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT3_OFFSET, MC33771C_TH_CT3_CT_UV_TH_MASK, MC33771C_TH_CT3_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT2_OFFSET, MC33771C_TH_CT2_CT_UV_TH_MASK, MC33771C_TH_CT2_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
error = BCC_Reg_Update(&drvConfig, BCC_CID_DEV1, MC33771C_TH_CT1_OFFSET, MC33771C_TH_CT1_CT_UV_TH_MASK, MC33771C_TH_CT1_CT_UV_TH(BCC_GET_TH_CTX((int32_t)MC33771C_TH_ALL_CT_UV_TH)));
How did you connect with 7 cells? what part number do you use? MC33771 or MC33772?
I use MC33771C, and short the 5 to 11th cell.
You can't directly short 5-11 cells, firstly you can configure and test using full 14 cells ,if no more issue please let me know!