GPIO Clock Gating on S32K118

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

GPIO Clock Gating on S32K118

ソリューションへジャンプ
2,826件の閲覧回数
zubizeratta
Contributor II

Hello,

I am checking the clock configuration of S32K118 and noticed that there's a PLATCGC register under System Integration module: 

"CGCGPIO - Controls the clock gating to the GPIO" 

This CGCGPIO bit is not mentioned any other place in the reference manual document. What is the function of this bit? Should we enable the gating before using GPIOs? 

 

タグ(4)
0 件の賞賛
返信
1 解決策
2,793件の閲覧回数
Senlent
NXP TechSupport
NXP TechSupport

Hi@zubizeratta

Yes, this bit must be enabled before using the GPIO

In fact you can find some description in the data sheet

Senlent_0-1713260894136.png

 

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
2,782件の閲覧回数
zubizeratta
Contributor II

Hello,

Thanks for the reply.

Yes, it's only mentioned in SIM module section, but I think it would be beneficial to do the same in GPIO section. Overlooking this could lead to losing some time on configuration of GPIOs. By the way It seems that there's a duplication error there so it should be "GPIO Clock Gating Control".

Regards.

2,794件の閲覧回数
Senlent
NXP TechSupport
NXP TechSupport

Hi@zubizeratta

Yes, this bit must be enabled before using the GPIO

In fact you can find some description in the data sheet

Senlent_0-1713260894136.png

 

0 件の賞賛
返信