Dear Officer,
We plan to use S32K114 for one automotive motor control project. Due to some functional safety/reliable requirement, we want to perform the RAM testing during each start up, and Flash memory testing periodically, and stack usage monitoring periodically. Can you advise if we can do and how to do? My concern is that during the coding is running (in flash), Can we still perform the flash read and check? and how to perform static usage monitoring during coding is running?
Thanks and best regards
He Wei
Hi,
S32K1xx targets ASIL B. To meet ASIL B requirements, the best way is to follow safety manual. The safety manual can be downloaded from SafeAssure community. If you don’t have an access, please follow this procedure:
https://community.nxp.com/docs/DOC-335524
The safety manual describes what is necessary in case of flash, EEPROM and RAM. The tests are based on performing of CRC or generation of CMAC using CSEc module.
SW example for CRC can be found in this application note:
https://www.nxp.com/docs/en/application-note/AN5413.pdf
https://www.nxp.com/webapp/Download?colCode=AN5413SW&docLang=en
Or, if you use SDK:
c:\NXP\S32DS_ARM_v2.2\S32DS\software\S32SDK_S32K1xx_RTM_3.0.0\examples\S32K144\driver_examples\system\crc_checksum\
This approach can be used for ‘static’ check and it’s possible to use DMA in runtime (DMA can write data to CRC module on background). There’s no problem with ‘simultaneous’ access to flash memory, this is managed by priorities on crossbar switch.
If you perform program or erase operation in runtime, the software should check MGSTAT bits, use read back to confirm the data are programmed correctly and also margin read can be used.
And regarding stack monitoring, the safety manual recommends:
“Implementation hint: It is possible to to use the data watchpoint comparator in DWT to
trigger a debug monitor exception on stack overflow and underflow.”
Other option I can see is to use Memory Protection Unit.
Regards,
Lukas
Dear Lukas,
Thanks a lot for the advise. We got other related requirements on the registers refresh and unused flash access handling. We need to periodically refresh on the uP registers setting to make sure its integrity. and in case of accessing on unused flash, SW shall reset. Can this be managed by S32K1xx? Can you advise further?
Thanks and best regards
He Wei