Hi @vivid_
In the S32K3xx Reference Manual, it is stated that there are 16 priority levels configurable in 4 bits in IRQn fields in NVIC IPRn registers.
According to NVIC_SetPriority(), the 4 less significant bits in IRQn fields in NVIC IPRn registers are not implemented.
VaneB_0-1730491154457.png
Whith the above information, the Table 4-18 (Priority grouping) of the ARM Cortex-M7 Devices Generic User Guide, can be understood in this way:
VaneB_1-1730491228474.png
In addition, about priority grouping, a function is also provided, see the following image.
VaneB_2-1730491249574.png
BR, VaneB