Hi @vivid_
In the S32K3xx Reference Manual, it is stated that there are 16 priority levels configurable in 4 bits in IRQn fields in NVIC IPRn registers.
According to NVIC_SetPriority(), the 4 less significant bits in IRQn fields in NVIC IPRn registers are not implemented.

Whith the above information, the Table 4-18 (Priority grouping) of the ARM Cortex-M7 Devices Generic User Guide, can be understood in this way:

In addition, about priority grouping, a function is also provided, see the following image.

BR, VaneB