Delay of LPSPI between frames

[fumiaki]

Regarding to the delay such PCSSCK, SCKPCS and DBT of S32K144 LPSPI CCR, SCKPCS in reference manual states "configures the delay from the last SCK edge to the PCS negation".

Even without PCS negation between frames, do the delays occur correctly?

When CS has been kept assertion between frames using GPIO, it seemed ​like the delays occurred.

[danielmartynek]

Hi @fumiaki,

The LPSPI module does not have an option to disable the PCS.

So even if you don't use the PCS output of the LPSPI module on a port but you use a GPIO instead, the module still keeps generating it with the configurable delay.   

Regards,

Daniel