The details about this question is as follows:
MCU: S32K148 in 144 pin backage on a custom designed board.
JTAG: JLink Plus in 10 pin configuration
IDE: S32DS 3.6.2 On Windows 11
Embedded OS: Bare metal with RTD 3.0.0
The board in question is a copy-paste design of a previously working version. However, I cannot write to flash over the JTAG; the readback is all 0xFF.
The JTAG pinout is as shown below:
And on the MCU, they are routed as follows:
TMS (JTAG pin 2) is connected to MCU pin 142 (JTAG_TMS)
TCK (JTAG pin 4) is connected to MCU pin 140 (JTAG_TCLK)
nRESET (JTAG pin 10) is connected to MCU pin 141 (reset_b)
TDO (JTAG pin 6) is connected to MCU pin 136 (JTAG_TDO)
TDI (JTAG pin 6) is connected to MCU pin 139 (JTAG_TDI)
Vref (JTAG pin 1) is connected to 3.3V) (as evidenced by the LED on the JLINK turning green at the start of a code download and staying orange'ish (i.e. both red and green on) at connection, also Jlink confirms that the target voltage is 3.3V)
The pull up/down values are as per the schematic above.
With this, I am not able to write to the flash. After code download, the memory regions just written as read back as 0xFF.
The output from Jlink is as follows:
J-Link>showhwstatus
VTref=3.341V
ITarget=0mA
TCK=1 TDI=0 TDO=1 TMS=0 TRES=1 TRST=1
Supported target interface speeds:
- 180 MHz/n, (n>=12). => 15000kHz, 13846kHz, 12857kHz, ...
- Adaptive clocking
J-Link>connect
Device "S32K148" selected.
Connecting to target via JTAG
ConfigTargetSettings() start
ConfigTargetSettings() end - Took 4us
InitTarget() start
JTAG selected. Identifying JTAG Chain...
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x0995001D, IRLen: 04, JTAG-DP
JTAG Chain Identified. Connecting to DAP TAP...
Successfully connected to selected DAP TAP.
InitTarget() end - Took 55.4ms
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x0995001D, IRLen: 04, JTAG-DP
DPv0 detected
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
[0][5]: E0041000 CID B105900D PID 000BB925 ETM
Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M4 identified.
J-Link>
What could be going wrong?
The JTAG connection error, when launching via S32 DS v 3.6.2 is as follows:
I see the error window shown below, and if I choose to erase the whole chip this same window appears again, followed by the error window shown next. Please keep in mind that this is a freshly laid out board and I am trying to bring it up.
I am not sure if the issue is with the JTAG connection on the board (which seems unlikely because a scan of the JTAG chain with Jlink is successful, and the same JTAG pod works fine with our previous generation boards based on the same chip) or with the chip somehow being protected (which also seems unlikely because this is a factory fresh board)
