S32G3 - Programming HFREF and LFREF & Programming RCCR[REF_CNT]

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S32G3 - Programming HFREF and LFREF & Programming RCCR[REF_CNT]

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Irshad2225
Contributor III

Hi, 


 While calculating  HFREF and LFREF, as per the reference manual(69.6.2) Monitored_clock variation and reference_clock variations are required. 

How can I get the variations limits for all the clocks I can use?

FIRC clock variation limit I found in the data sheet.

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chenyin_h
NXP Employee
NXP Employee

Hello, @Irshad2225 

Thanks for the post.

There is an example for calculating them in RM(the data in the formula are only for reference), for accurate values of Monitored_clock variation and reference_clock variations, it is suggested checking the S32G data sheet for FIRC, for FXOSC, variation values should be checked in the crystal's data sheet.

 

BR

Chenyin

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rafaelakutch
Contributor I

The user is calculating HFREF and LFREF according to reference manual 69.6.2 and needs the monitored_clock variation and reference_clock variation limits for all usable clocks. They have found the FIRC clock variation limit in the datasheet and are asking where to find the limits for the other clocks. This is essential to ensure stability, just like perfecting techniques to improve your high scores in .

 

Sprunki Game

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chenyin_h
NXP Employee
NXP Employee

Hello, @Irshad2225 

Thanks for reply.

From my opinion, the derived clock would share the same frequency tolerance of its parents clock in your examples.

 

BR

Chenyin

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Irshad2225
Contributor III

Hi, 

If I get the frequency variations for the reference clock, will their respective derived clocks(monitored clock) have the same variations in terms of ppm or percentage?
E.g., assume reference clock FIRC(48MHz) has frequency variation for +/-50ppm, and a monitored clock is derived from it to 24MHz. Will the frequency variation be the same or will it change?

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romen54
Contributor I

Hello,
To calculate HFREF and LFREF (High-Frequency Reference and Low-Frequency Reference) as per the reference manual section 69.6.2, you need monitored clock variation limits and reference clock variation limits. These values are typically defined in terms of frequency tolerance or accuracy, such as in ±ppm (parts per million) or ±%.

Best Regards
romen

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chenyin_h
NXP Employee
NXP Employee

Hello, @Irshad2225 

Thanks for the post.

There is an example for calculating them in RM(the data in the formula are only for reference), for accurate values of Monitored_clock variation and reference_clock variations, it is suggested checking the S32G data sheet for FIRC, for FXOSC, variation values should be checked in the crystal's data sheet.

 

BR

Chenyin

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Irshad2225
Contributor III
Hello Chenyin,
Thanks for the reply,
For e.g:
reference clock is FXOSC_CLK
Monitored clock is CAN_PE_CLK
For CAN_PE_CLK, configured source clock is PERIPH_PLL_PHI2_CLK.
Question: Does a change of source clock will change reference clock?
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