S32G3 Bootloader for programming A-core or M-core application SW

[Prateeksha]

How to re-program/Update the s32G3 VPN A-core and M-core application SW using Bootloader over CAN/ETH etc? Is there any programming sequence and bootloader architecture available for the same? Does Software package manager package- has the re-programming of M-core and A-core application functionality via Bootloader?

[Daniel-Aguirre]

Hi,

We might be misunderstanding your overall request. If so we apologize.

The available bootloader for S32G platform is available under the "Integration Reference Examples" package. This bootloader will fetch all information directly from QSPI. We understand that there is no "serial boot" bootloader available. We do apologize.

As for overall serial boot management, we can recommend looking into the following community thread:

Solved: S32G2 - In serial boot, how to run M7 application in SRAM? - NXP Community

Please, let us know.

[Prateeksha]

I am elaborating my questions here,

1.Is there any bootloader Architecture diagram or detailed boot flow diagram available for booting M-core and A-core image on S32G3?

2.For reprogramming M-core and A-core application SW , does the S32G3 VNP SW package has bootloader that supports reprogramming over CAN/ETH?

• For example, during the development phase for serial booting,  reprogramming of M-core and A-core application SW may be required then how it will be done via existing bootloader from “Integration Reference Examples “package?
• If existing bootloader does not support the reprogramming, then is there any other bootloader package which supports reprogramming of M-core and A-core application SW over CAN/ETH via some tool/scripts? Could you please support to get the package information if any?

3.If bootloader package does not support reprogramming, then how do we reprogram the M-core and A-core of S32G3 VNP?Is it always QSPI from External flash(which is already having Application SW downloaded on it).

4.Does the existing bootloader package from S32G3 “Integration Reference Examples ”only supports booting via QSPI(External Flash)?

[cezarionescu]

Hi.

1. ) we have such diagram hosted in NXP tool for design which is Enterprise Architect. If you are an NXP user, text me over Teams and I can share a snapshot of it. 

2.) 

A the moment the bootloader delivered via Platform Software Integration has a static approach, meaning that you boot only once (based on a static configuration) and then after cores start, bootloader context is loss.

We are in progress of making the boot process more flexible by using a boot service, which can be invoked at runtime (i.e. upon an OTA) and can be dynamically programmed, including where to boot from, and what cores to boot or reboot. This is WIP for G2/G3 device (in GoldVIP) and Z2/E2 device (GreenVIP). I estimate it available in a release in April/May timeframe.

3.) See explanation from point 2.) Bootloader can be reconfigured, but rebooting with the new configuration requires a cold boot. Bootloader for G2/G3 device is currently being distributed in GoldVIP, no longer in Platform Software Integration

4.) The bootloader package from S32G3 “Integration Reference Examples"  is not longer maintained  in the “Integration Reference Examples" deliverable, instead it's being distributed as part of the GoldVIP deliverable (nxp.com/goldvip).

We currently support boot from QSPI only because this is the only way to enable secure boot, where secure memory regions (aka SMR) must be installed in flash. There is no way to install SMRs in other boot sources such as SD/eMMC cards.

Technically the bootloader can be easily extended to boot from other sources. Its code is open to customizations.

[Daniel-Aguirre]

Hi,

Thanks for your feedback. Below will be some comments on regards of your questions:

1.Is there any bootloader Architecture diagram or detailed boot flow diagram available for booting M-core and A-core image on S32G3?

[NXP]: For the available bootloader, we see there is no information as per you are looking for. There is a Bootloader User Manual, which might detail more of the application, but no flow diagram. We do apologize.

2.For reprogramming M-core and A-core application SW , does the S32G3 VNP SW package has bootloader that supports reprogramming over CAN/ETH?

• For example, during the development phase for serial booting,  reprogramming of M-core and A-core application SW may be required then how it will be done via existing bootloader from “Integration Reference Examples “package?
• If existing bootloader does not support the reprogramming, then is there any other bootloader package which supports reprogramming of M-core and A-core application SW over CAN/ETH via some tool/scripts? Could you please support to get the package information if any?

[NXP]: As said before, the only available bootloader only support booting directly from QSPI. We do apologize.

3.If bootloader package does not support reprogramming, then how do we reprogram the M-core and A-core of S32G3 VNP?Is it always QSPI from External flash(which is already having Application SW downloaded on it).

[NXP]: As said before, there is the possibility of using the serial boot mode, but there is no NXP bootloader that support this. Under S32G, the expected boot flow is indeed booting from QSPI, but not limited to.

4.Does the existing bootloader package from S32G3 “Integration Reference Examples ”only supports booting via QSPI(External Flash)?

[NXP]: This is correct.

Please, let us know.