S32G2 - Multicore standby mode implement

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S32G2 - Multicore standby mode implement

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Shenghao
Contributor III

Hi NXP

According to this figure in AN12952 of S32G2, all activities (ex: IRQ) on all cores expect main core need to be disabled or stop before executing WFI.

But we can find any function to do these task.

We tried to implement it, but it seems the WFI status of cluster0 and cluster1 keep in 0.(non-disable)

Could you help to give me a hint?

 

We compared the WFI status in M-core and A+M core when DUT power on for reference in below table

Shenghao_0-1677219945840.png

 

Shenghao_1-1677219945902.png

Thanks.

Shenghao

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback.

At this moment, the only multicore example available is the one provided on A13750, which is more of a communication example between the different cores available in S32G. We do apologize.

There is a community post that creates a Standby Demo using a UART Example, we could recommend taking a look into it to see if this helps with your development.

S32G: M kernel Standby demo and how to porting to ... - NXP Community

If this is not enough, we could recommend opening a ticket on NXP online services, for them to further study the possibility of a multicore standby example.

Please, let us know.

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Shenghao
Contributor III

Hi 

I've checked it. But we don't know how to implement on our platform.

Do you have any multi-core examplem code for standby mode?

Thanks.

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback.

At this moment, the only multicore example available is the one provided on A13750, which is more of a communication example between the different cores available in S32G. We do apologize.

There is a community post that creates a Standby Demo using a UART Example, we could recommend taking a look into it to see if this helps with your development.

S32G: M kernel Standby demo and how to porting to ... - NXP Community

If this is not enough, we could recommend opening a ticket on NXP online services, for them to further study the possibility of a multicore standby example.

Please, let us know.

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Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

For the Core turn-off sequence, there is a flow-diagram shown on the S32G2 reference manual [Page 1083, S32G2 Reference Manual, Rev. 6, 11/2022]. Have you taken a look into it?

This should be done with the MC_ME module inside the S32G.

Please, let us know if this information was helpful or not.

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