S32K312 STM clock issues

[JayJay_H]

Hi

Recently, I have been using STM0 as a millisecond level timestamp to start timing from power on

Prescaler is 240，clock source is FIRC_CLK(48Mhz)

The time is obtained through the Stm_Ip_GetCounterValue(0) interface

During use, it was found that the obtained time was faster than normal time, for example, the actual time passed 500ms but the obtained time was 600ms, and it has been getting faster all the time

But when I switch the clock source to AIPS_PLAT_CLK(60MHz) or FXOSC_CLK(16MHz), the time value obtained from the interface is accurate

The attached image shows my configuration of STM and Clock in DS. Do I have any other options to configure?

[danielmartynek]

Hi @JayJay_H,

I can't explain the 20% inaccuracy.

But +-5% can be expected.

FIRC can be measured at CLKOUT.

S32K312 clock system diagram

Regards,

Daniel

[JayJay_H]

Hi Daniel

Thank you for your reply

What about AIPS_PLAT_CLK and FXOSC_CLK

Is there any inaccuracy in AIPS_PLAT_CLK and FXOSC_CLK?

If so, what is the inaccuracy range,also +-5%?

Best regards,

Jay

[danielmartynek]

Hi Jay,

The accuracy of FXOSC is given by the tolerance of the external crystal/resonator.

If AIPS_PLAT_CLK is generated by the SPLL, there is Jitter specified in the DS, Table 41.

Regards,

Daniel

Best regards,

Daniel

[JayJay_H]

Hi Daniel

Thanks for your reply.

I found the following attachment while reading  the referance manual

My questions are:

what's the meaning of "TS1_CLK—AIPS_PLAT_CLK" ?

According to the attachment,  does it means that STM0 should use AIPS_PLAT_CLK?

(Please forgive me for replying to you so late, recently it was Chinese New Year and I was on holiday

BTW, Happy New Year of the Loong)

[danielmartynek · Accepted solution]

Hi @JayJay_H,

It means TS1_CLK is clocked from AIPS_PLAT_CLK.

If you have any question on Time stamps, please create a new thread.

Thank you,

BR, Daniel