Issue with Pin and clock Configuration for S32K146 using SDK_3.0RTM

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Issue with Pin and clock Configuration for S32K146 using SDK_3.0RTM

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shudhamatinarha
Contributor II

We are generating code through processor expert for S32K146 SDK ver.3.0.0 RTM. We facing below issues,

1.Not able to generate pin configuration for some of the random pins.

2.Facing issue while disabling clocks for VLPS mode.

please find attached screen shots(PE_VLPS.png and PE_VLPS1.png) and guide for the same.

3.Also not able to generate "startup_S32K146.s" startup file.Is there any settings needs to do?

Please find attachment(Startup_File.png).

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2 Replies

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi shudhamatinarhare,

You need to fix all the errors in you configuration first.

For example:

You cannot select SIRC as the clock source, if SIRC is disabled (0Hz).

pastedImage_2.png

Also, the SDK RTM 3.0.x driver (POWER_SYS_SetMode(VLPS, POWER_MANAGER_POLICY_AGREEMENT) function) switches the system clock to SIRC automatically before the MCU enters the VLPS mode.

You can step the code a watch registers.

The Startup_S32K146.s file is in this folder:

pastedImage_3.png

Regards,

Daniel

459 Views
shudhamatinarha
Contributor II

Thanks Daniel Martynek for your valuable reply.

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