PortP Partial Drive/Full Drive on S12ZVL

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PortP Partial Drive/Full Drive on S12ZVL

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ikkishingu
Contributor II

Hello,

 

About PortP on S12ZVL, Partial Drive or Full Drive are selectable,
then does Partial Drive mode have any merit?

 

For example, there are the specs(output current vs voltage drop) for PP7 as below.
Partial Drive @IOH = -2mA  : VDDX-0.8V
Full Drive @IOH = -10mA : VDDX-0.1V
Full Drive @IOH = -18mA : VDDX-0.2V
From these data, it seems that Full drive mode has a merit for output voltage drop
on the other hand the voltage drop on Partial Drive mode is big
despite the output current is smaller than the Full drive's one.

 

Best Regards,

Ikki

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lama
NXP TechSupport
NXP TechSupport

Hi Ikki,

Some of S12(X) GPIO pins include a reduced current mode.

HCS12 I/O pins include a reduced current mode. This mode is provided to reduce EMI emissions in cases where the load being driven by the I/O pins is light and full drive strength is not needed.

For details I would like to recommend our application note AN2434 Input-Output Pin Drivers on HCS12 Family MCUs http://www.freescale.com/files/microcontrollers/doc/app_note/AN2434.pdf     pages 10~14.

Note: This application note was created for older S12 MCUs which was built on 250nm technology. Some details (numbers) didn’t fit to newer S12(X) MCUs which was built on 180nm technology (like S12XE family) however general information and principles are the same. Output voltage drop isn’t fully linear function of output current (see application note), but on limited range of output current we can use this simply estimation.

Best regards,

Ladislav

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lama
NXP TechSupport
NXP TechSupport

Hi Ikki,

Some of S12(X) GPIO pins include a reduced current mode.

HCS12 I/O pins include a reduced current mode. This mode is provided to reduce EMI emissions in cases where the load being driven by the I/O pins is light and full drive strength is not needed.

For details I would like to recommend our application note AN2434 Input-Output Pin Drivers on HCS12 Family MCUs http://www.freescale.com/files/microcontrollers/doc/app_note/AN2434.pdf     pages 10~14.

Note: This application note was created for older S12 MCUs which was built on 250nm technology. Some details (numbers) didn’t fit to newer S12(X) MCUs which was built on 180nm technology (like S12XE family) however general information and principles are the same. Output voltage drop isn’t fully linear function of output current (see application note), but on limited range of output current we can use this simply estimation.

Best regards,

Ladislav

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ikkishingu
Contributor II

Dear Ladislav-san,

Thank you for your helpful information!

It makes sense to me.

Ikki

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