MPU access violation for S12X microcontroller

[Ratndeep]

I am trying to write test case for the execution. For that I given one address that are between in start and end address. So while executing the execution test case for S12x controller my control is not jumping on the provided address means not able to change the page address that's why even I give access for the execution or not, getting access violation. So any solution for this. This is my test code. 

tUI16 VarLocTotest=0x7788;
tBOOL Dyn_Write_Successful = FALSE;
tBOOL Dyn_Read_Successful = FALSE;
tBOOL Dyn_Exe_Successful = FALSE;
tUI8 Testcase_no_Dyn=0;
tUI32 data_read2= 0x4455;

typedef void (*funcptr1)(void);

/* address to be tested*/
tUI32* address_test_appRom = (tUI32*)0x7D4E2A ;/*0x07A0000*/
funcptr1 funct1_appRom = ( funcptr1) 0x7D4E2A;
tUI32 AddressUnderTest_Dyn;

{

 Dyn_Exe_Successful = FALSE;

   /*  execute  */

   *(tUI16*)address_test_appRom =0x0A00;

     funct1_appRom();

     Dyn_Exe_Successful = TRUE;

}

[lama]

Hi,
The attached code creates PIC code (position independent code) and copies it into RAM.
Then pointers to these functions in RAM are created and the function is run out of the RAM.
The far pointer is used because these functions are far. The are able to be executed out of the rum because they are stored in the near memory so page is not necessary.

NOTE, I mean PPAGE. The fact is, you should keep in mind, that only PPAGE can be used to run the code out of the paged memory so it limits code to be placed only in the internal FLASH or any space accessible by PPAGE register. No other page register can be used so the code which you want to execute out of the RAM MUST be placed in nopaged RAM space.

Best regards,
Ladislav

[lama]

Hi,

 the issue can be addressing mode, pointer and compiler approach.

You use a global address but logical address must be used.

I prepared prepared following example under CodeWarrior. Valid for s12XD..., S12XE...

I suggest to step the code and look into assembler instructions and CPU register what is set in reality.

//==============================================================================
// Banked Memory Model
// I suppose the return code from the function is RTC so the function
// The functio xx() with known address will be called by CALL
//==============================================================================
#include <hidef.h> /* common defines and macros */
#include <mc9s12xdp512.h> /* derivative information */
#pragma LINK_INFO DERIVATIVE "mc9s12xdp512"
//==============================================================================
// Local types definitions
//==============================================================================
#define UBYTE unsigned char
#define SBYTE char
#define UWORD unsigned int
#define UDWORD unsigned long int
//==============================================================================
// Function definitions
//==============================================================================
#pragma CODE_SEG __FAR_SEG MY_SEG // the segment is located in the PPAGE 0xF5
void far xx(void);
#pragma CODE_SEG DEFAULT
//==============================================================================

void (*far p_fcnt_XX)(void);  // pointer to a function
//==============================================================================
#pragma CODE_SEG __FAR_SEG MY_SEG

void far xx(void) // the function is located at global address 0xF58000 (GPAGE_OFFSET)
{ // it is logical address 0x7D4000 (PPSGE_Offset)
  asm nop;
  asm nop;
  asm nop;
  asm nop;
  asm nop;
}

#pragma CODE_SEG DEFAULT
//==============================================================================
//void main(void)
//==============================================================================

void main(void)
{
volatile UDWORD addr,addr0, addr1;

for(;;)
{

  // 1)
  ((void(*far)()) 0xF58000)(); // logical address of the function xx()

  // 2)
  p_fcnt_XX = (void(*far)()) (0x8000F5);
  p_fcnt_XX();

  // 3)
  addr = 0xF58000; // a logical address PPAGE_OFFSET
  addr = ((addr>>16) & 0x000000FFUL) + ((addr <<8) & 0x00FFFF00UL);
  p_fcnt_XX = (void(*far)()) (addr);
  p_fcnt_XX();

  // 4)
  addr = 0x7D4000; // a global address GPAGE_OFFSET
 

  // convert it to ppage_offset and pointer to function accepted by CW 

  addr0= addr/0x4000;      /// convert it to ppage_offset
  addr1= addr - (addr0 * 0x4000);
  addr = (addr0 & 0x000000FF) | ((addr1 | 0x8000)<<8);
  p_fcnt_XX = (void(*far)()) (addr);
  p_fcnt_XX();

  // or in one line

  addr = 0x7D4000; // a global address GPAGE_OFFSET

  // convert it to ppage_offset and pointer to function accepted by CW
 

  addr = ((addr/0x4000) & 0x000000FF) | (((addr - ((addr/0x4000) * 0x4000)) | 0x8000)<<8);
  p_fcnt_XX = (void(*far)()) (addr);
  p_fcnt_XX();

  //---------------

  xx();
  }
}
//XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Best regards,

Ladislav

[Ratndeep]

Hello, 

Thanks for the reply, As you suggested, I used logical address and it is working for the only ROM sections. But when I tried for the RAM sections, getting the access violation even if I allow for execution. can we execute in the RAM section? do you have any solution for this issue?

x- gate RAM (s- 0xF8000 and e- 0xF8FFF) 

common RAM 

Application ram 

For these sections I allow for the execution.