Hi All,
MC9S12C64, Code Warrior 5.9.0, coding in assembler.
I've been wrestling with a problem I am having getting the input capture function to work for well over a week now with no success. It's time to swallow my pride and beg for help.
I have all the other timer functions working well, but the IC has me stumped, both IOC4 and IOC5. I put together an absolute minimum test code (attached).
If anyone can offer suggestions I'd really appreciate it.
Regards,
Robert
已解决! 转到解答。
Hi Daniel,
Update. After trying just about every combination of everything I could think of I finally got the test program to work. I think the key issue was the way I was clearing the flags. As for the IRQ, I didn't notice that the pullups for Port E are set after reset. I used an external pullup in my other program so that kind of messed me up. I've attached my latest test program. Now I have to see if I can get them to work in my main program, but at least I have this working for an example.
Thanks so much for all your help. I doubt that I could have solved this without it.
Regards,
Robert
Hi Daniel,
I'm a bit confused about the PWM and TIM functions and which pins they are assigned to. Should I be checking the PTIP register, the PTIT register or both. At this point it looks like IOC4 is not generating an interrupt but it definitely has a 5 volt square wave signal to the IOC4 pin. I discovered this by placing a break point in the ISR with the debugger, but the program never got there.
On another matter, I could use the IRQ, or XIRQ pin to monitor my external signal but I'm not clear on how to set it up. Could you advise me on this please?
Regards,
Robert
Robert
Hi Daniel,
I'm not fluent in "C" but I believe the MC9S12C64 IRQ is on Port E1 and XIRQ is on Port E0, not Port B, as your attachment indicates. I didn't bring out PE0 on my board so I am just trying to get the IRQ pin working.
I wrote a new test program to test the IRQ, IOC4 and IOC5 (attached). It is about as brief as I could make it. I have the ITR toggle PTM5 every 100mS. I use this as a trigger to test the input capture ISRs. I have checked the signal at the ISR inputs with a scope and it is a nice clean 5 volt square wave. When I read PTIT is just shows pins 7 and 6 high which is legitimate as they are commanded high in the timer set up. At no point do they indicate high for IOC4 or IOC5. When I put a break point in any of the ISRs the program doesn't get there which indicates to me that the ISRs have not been triggered. Can you offer any suggestions as to what I am doing wrong?
Regards,
Robert
Hi Daniel,
I tried running another larger program I am working on that uses IOC5. It gets a pulsed 5 volt signal to the main board where it is inverted. IOC5 has a pullup and the pulse pulls IOC5 low. I have confirmed this with a scope. With this signal I can also use jumpers to test IOC4 , PE0 (XIRQ) and PE1 (IRQ). I have confirmed continuity of the input pins on the board to the pins on the processor. Even though I have a good signal at the board I'm not able to read it in the ports on the debugger, stopped or running. PTT and PTIT read the same, %11100000. This makes sense because pins 7 and 6 are initialized high and not changed in the program. Pin 5 has a pullup. A change in IOC4 or IOC5 is not indicated with a pulsed input. When I read PORT E, it is always %00001111. So PE0 and PE1 are always high, no matter what the signal to the board pin is. This indicates to me that there could be an internal problem in the processor, but it seems odd that it should affect these four pins. All the other timer functions work fine, as well as the ITR and ADC channels. Is there any other way I can confirm if these pins are damaged or not?
Regards,
Robert
Hi Robert,
There is one issue in the code I overlooked.
It is the BSET instruction used to clear the flags.
BSET does read-modify-write operation at the register, which clears every flag that is set in the register.
It is explained here:
https://www.nxp.com/docs/en/application-note/AN2554.pdf
Can you test it?
Thank you,
Daniel
Hi Daniel,
Thanks for that link. I studied it and think I have made the correct changes to my program (attached). Unfortunately I still can't get either IOC channel or IRQ to trigger their respective ISRs.
I'm still not quite clear on the IRQ channels. It is my understanding that IRQ (PE1) is set to falling edge capture only if IRQCR, IRQE is set to 1. To enable PE1 does IRQCR, IRQEN have to be set to 1 as well? I tried that and still didn't get it to work.
Is PE0 a separate IRQ channel and if so what triggers it, Falling edge, Rising edge or Hi or Lo level? The manual doesn't give me much information on this, or at least I can't find it if it does.
Regards,
Robert
Hi Robert,
I believe this is well explained here:
https://www.nxp.com/docs/en/data-sheet/MC9S12C128V1.pdf
Can you double-check the part ID in the PARTIDH and PARTIDL registers?
Thank you
Hi Daniel,
Thanks for the clarification on IRQ and XIRQ. I think I understand it now. I have experimented with use of the pullup but I still can't get it, or IOC4 or IOC5 to trigger their respective ISRs.
PARTIDH is $31, PARTIDL is $03. What does that tell you?
Regards,
Robert
Hi Daniel,
Update. After trying just about every combination of everything I could think of I finally got the test program to work. I think the key issue was the way I was clearing the flags. As for the IRQ, I didn't notice that the pullups for Port E are set after reset. I used an external pullup in my other program so that kind of messed me up. I've attached my latest test program. Now I have to see if I can get them to work in my main program, but at least I have this working for an example.
Thanks so much for all your help. I doubt that I could have solved this without it.
Regards,
Robert
Hi @roberthiebert,
I have gone through the project but I haven't spotted anything wrong in the configuration.
Can you double check all the registers in the debugger's register view?
And instead of just checking the PTM4, read the interrupt flag of the TIM_4 channel.
Also, The PTIP register will give you the state of the pin in any mode.