Double bit ECC Error handler code design


Double bit ECC Error handler code design

NXP Employee
NXP Employee

When double bit ECC errors is reported by SRAM_ECC module, is there any recommend about what should do in handler code? Is that possible to know if cause is double bit ECC errors or others(not in debug mode)? Is that possilbe to know the that 2 bytes' address?

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NXP Employee
NXP Employee

Hi Xin,

The double bit ECC error is uncorrectable error and it triggers S12ZCPU machine exceptions.

When the machine exception occurs, the MMCECH, MMCECL registers inform you about the source of this exception (one of them is also uncorrectable ECC error).

At the same time when MMCEC register is set to a non-zero value, access information is captured in the MMCPCn and MMCCCRn registers. The MMCCCR register contains captured flags from CCR register.

The MMCPC register contains captured program counter that might be possible reconstruct source of the issue.

Note: The machine exception is not a standard interrupt, there is no stack frame created for a Machine Exception so simply calling "RTI" (which expects a stack-frame) at the end of the Machine Exception routine will result in a crash.

The difference is explained here:

("Chapter 7, Exceptions").

When we detect double ECC fault or illegal memory accesses, we cannot be sure that we read and execute correct code, therefore correct recovery action should be (signalize error and) MCU reset.

See example of MCU reset inside machine exception routine:

I hope it helps you.

Have a great day,

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