I am using mc9s12xdp512 controller for our project development.
As part of our development, we are now planning to have Diagnostics for our system.
So as part of this we want to capture and log Watchdog Reset.
For this I tried to write my own ISR or function and tried to assign this to vector table at 0xFFFA. But compiler gave error saying this Vector location is already assigned with System Reset point.
So can someone let me know, is there any way to capture and log failure that Watchdog reset has happened.
Or can you let me know how we can customize the ISR of watchdog?
Hi Radek Sestak
Do you have 9S12XEP 100 COP Reset Example?
Hi Tafeng,
Sure, please see attached example codes.
Please be aware that COP reset source detection may be affected by external capacitance at RESET pin. For more details, please look at:
S12 FAMILY DEVICES COP RECOGNITION CONSIDERATIONS_v2.0.pdf
Other examples for S12XE:
LAMA's S12XE unofficial examples
I hope it helps you.
Have a great day,
Radek
COP watchdog reset is hardware reset. It cannot be debugging via BDM because BDM communication/synchronization is lost during reset. I would like recommend simple LEDs for debugging watchdog reset.
In attachment you can find simple example code for COP watchdog.
You cannot handle this event as standard Interrupt. Standard Interrupt ends by RTI assembler command. COP reset interrupt routine must ending by jump to main program (there is no place where program can return).
I would like notice that code in COP_ISR runs before Start12.c code therefore variables and stack are not initialized. So, I would like to recommend use simplest code as possible.
External circuitry connected to the RESET pin should not include a large capacitance that would interfere with the ability of this signal to rise to a valid logic 1 within 64 SYSCLK cycles after the low drive is released. See chapter 2.5 Resets at S12XD RM(page 113).
For detecting COP reset it is necessary that voltage level at RESET pin achieve high level during 64 SYSCLK cycles after RESET pin release. After reset, SYSCLK value is equal to OSCCLK. If we take case when we use 16MHz oscillator, 64 SYSCLK cycles presents 4us.
So, if we have 2.2kOhm pull-up resistor at RESET pin, capacitance at RESET pin should be below approximately 1.8nF. Otherwise we detect POR / LVR / Illegal Address Reset / External Reset.
Note: Simply RC cell, RC constant=Tau=R*C represents time when voltage achieve approximately 2/3 value. Safety detection level for high value at pin is also approximately 2/3 value of VCC. So we can use simply calculation. C<64/(R*fOSC). In calculation we omitted capacitance and internal pull-up of RESET pin.
Hello Radek,
Thanks for your elaborate inputs and sorry for my delay in reply.
I used the code sent by you by adding code to update COPCTL with some value and LED on.
I am using s12x DP512 evaluation board and i think it doesnot have higher capacitence. So there should be no issue with this to reset pin.
But with the project attached with this reply, i was not able to see the System Reset by COP and COP ISR execution.
Can you please help me with this.
Which evaluation board you are using?
Evaluation board typically use 100nF capacitor at RESET pin (This too much for COP reset detection).
If you using SK-S12XDP512 (EVB9S12XDP512), please disassemble C213 (top side of PCB, near to CRYSTAL).
If you using DEMO9S12XDT512, please disassemble C36 (bottom side of PCB, near to RESET button).
If you using APS12XDT512(CSMB12XDT512), please disassemble C46 (bottom side of PCB, near to RESET button).
Could you pleas check the PRM file, as well as the source code for interrupt vector? Whether address 0xFFFA is allocated twice?
Below is the code for COP vector in PE stationery, hope it helps! If not, could you please attach a simple project to help us reproduce the error?
static const tIsrFunc _ResetVectorTable[] @0xFFFAU = { /* Reset vector table */
/*lint -restore Enable MISRA rule (1.1) checking. */
/* Reset handler name Address Name Description */
&_EntryPoint, /* 0xFFFA ivVcop unused by PE */
&_EntryPoint, /* 0xFFFC ivVclkmon unused by PE */
&_EntryPoint /* 0xFFFE ivVreset used by PE */
};