ADC Usage without CSL

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ADC Usage without CSL

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manishsangram
Contributor IV

Hello,

 

We are using the S12ZVM128 chip to control BLDC motors.

We already have CSL setup for ADC for motor control requirements. This is working fine.

We have 2 ADC1 inputs that are required to be polled at low frequency and when the motor is not running.

We do NOT want to change the CSL/RVL address due to several reasons.

We do NOT want to add to the CSL because we do not want unnecessary conversions when motor is running.

 

We could add to CSL while keeping the previous entry set as CMD_SEL[1:0] as 1,1 but then we can't reach this new entry and also we can't set the index as ADCCIDX is RO.

 

Is there any way to achieve the above or just run an Adhoc ADC command without running through the CSL ? Already ADCFLWCTL is set for DUAL access on both ADC's

 

Manish

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RadekS
NXP Employee
NXP Employee

Hi Manish,

Unfortunately, the LBA ADC module was not directly designed for such application.

The only way how to start conversion is through ADC command somewhere in memory (Flash/RAM…) and ADC Trigger.

Few ideas:

 

  • You may stop ADC by clearing ADC_EN bit, reconfigure command and result lists and enable ADC again by setting ADC_EN bit. Since enabling and disabling ADC needs some time(tREC, tDISABLE,…), I suppose that this is not suitable solution.

 

  • You may configure ADC for double buffer command list - CSL swapping. In that case (and when CSL are in RAM), you may periodically re-configure commands in alternative command list (=currently unused command list). But, you should somehow manage that CSL with motor control commands will be always prepared prior any motor control trigger event. Hard to say how trivial this task may be – it depends on many conditions.

 

  • You may fill CSL by all commands where the sequence will start by commands necessary for motor control followed by low priority commands. The motor control command may invoke ADC Conversion Interrupt (INTFLG_SEL[3:0] != 0) instead of End Of List Interrupt.  In ADC ISR we may abort sequence with currently unnecessary commands…. if needed. When motor not running, you may still trigger measuring of all ADC channels include ADC channels related to motor control. And you simply do not use these results. In that case, you should only simply react on End Of List Interrupt flag instead Conversion Interrupt flag.

 

  • You may externally route these analog signals to second, less rushed ADC module …

AN5168 Using the ADC Module in S12ZVM

http://www.nxp.com/files/microcontrollers/doc/app_note/AN5168.pdf 

http://www.nxp.com/files/microcontrollers/doc/app_note/AN5168SW.zip 

I hope it helps you.

Have a great day,
Radek

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manishsangram
Contributor IV

Hello Radek,

Thank you very much for your reply. Unfortunately probably none of the solutions are a perfect fit for us.

I just wanted to check specifically about any possibility of setting the Index in code. OR some technique which uses a similar approach? In my original post I had the following text:

"We could add to CSL while keeping the previous entry set as CMD_SEL[1:0] as 1,1 but then we can't reach this new

entry and also we can't set the index as ADCCIDX is RO."

I am looking for a conceptually similar approach if possible, directly or indirectly overriding the ADCCIDX or so.

Thanks

Mohammed

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RadekS
NXP Employee
NXP Employee

Hi Manish,

Unfortunately, I am not aware about that option, the ADC runs on its own state machine and indexes are provided only for read.

The indexes are cleared by Restart Event. The second option is ADC soft reset (the procedure for Soft reset is part of errata for ADC module and stop mode).

I am sorry.

I hope it helps you.

Have a great day,
Radek

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