Hi
Any value written to the PWMCNTx register causes PWM counter to be reset.
The only solution is to trigger the PWM channels by software with certain delay.
Although there is always certain latency, it works.

For instance, the example above shows four left-aligned PWM signals, where
PWM0: Used only for generating delay.
PWM1: Original signal
PWM2: shifted (90 degree), enabled on falling edge of PWM0
PWM3: shifted (180 degree), enabled on rising edge of PWM0
PWM0 and 1 are enabled from main function at the same time. The other two signals are triggered from ISR.
Pins P6 and P7 are set for pin event detection and connected to PWM0 (Pin P0).
When falling (P7) or rising (P6) edge is detected, the ISR enables other PWM.
Therefore, the phase shift is determined by the duty cycle and the period of PMW0.
Once all shifted PWM are enabled, PWM0 may be disabled.
Please see the project attached.
I hope it helps
Daniel