ECC

[Sebster]

Hi NXP,

I have two identical LS1021A boards based on the IoT reference design: Board 1 uses ECC, Board 2 does not (but PCB is identical to board 1). Planning on simply not populating the ECC memory on Board 2.

I need to understand how to terminate DDR3 ECC signals on Board 2, as I need to keep EMI low of course. Would NXP have an appnote

that shows how to do this correctly?

Thanks

Sebster

[r8070z · Accepted solution]

Have a great day,

The NXP provides app. note QorIQ LS1021A Design Checklist

http://cache.nxp.com/files/32bit/doc/app_note/AN4878.pdf

which says that the pins belong to the ECC  DDR chip can be left unconnected if they are not used. The best way is do not connect the ECC balls to any trace on the PCB.

If you cannot do that then in order to be on safe side I suggest place parallel terminators on MDQS8/ MDQS8_B to keep it in the inactive state (i.e. pull-down on the MDQS8 and pull-up on the MDQS8_B).

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