Have a great day,
I see form attached picture that datasheet should say that there are 16-bit row address, 10-bit column address, 3-bit bank address and dataword width is 16-bit. Hence single bank capacity is (rows*columns*width) = 2^16*2^10*16 bits = 1 Gb.
DDR3 SDRAM's prefetch buffer size is 8n (eight datawords per memory access), i.e. for 16-bit datword prefetch buffer size is 8*16=128 bits. From 10-bit column address of 16-bit dataword the 7 msb select 128-bit chunk for prefetch on memory access. The rest 3 lsb select dataword in the prefetched 128-bit.
So on the figure they prefer present 2^16*2^10*16 bits in a single bank as 2^16*(2^7*10^3)*(2^4) bits = 65536*128*128 bits
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