i.MX RT1052 - Will we get another nested ISR within an ISR?

[Cindy]

Hi,

My question is will we ever get a nested ISR within an IRQ Handler?

In other words, whenever an interrupt is triggered, its ISR(interrupt service routine) will be called. Let say this IRQ handler is GPT2_IRQHandler. While processing this ISR, will another interrupt of higher priority is being triggered and its ISR being called being exiting GPT2_IRQHandler?

Thank you.

Best Regards,

Cindy

[Cindy]

Hi Erich,

Thank you for your prompt reply and the link to the very useful articles that have answered all my queries about the interrupt.

Best Regards,

Cindy

[ErichStyger · Accepted solution]

Hi @Cindy ,

short answer: yes.

longer answer: see https://mcuoneclipse.com/tag/nvic/

The RT1052 is an ARM Cortex-M7 and features the NVIC (Nested Vectored Interrupt controller): so if inside an interrupt there is another interrupt getting pending with higher urgency, it will interrrupt that interrupt.

I hope this helps,

Erich