control heap and stack placement?

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control heap and stack placement?

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peterruesch
Contributor IV

Hi,

i'm trying to get a demo an TWR_K65 running but faced the following issue:

heap and stack are placed at the last memory area listed in the PE "CPU->Build options" view.

the following lines are from the generated linker script.

  .heap :

  {

    . = ALIGN(8);

    __end__ = .;

    PROVIDE(end = .);

    __HeapBase = .;

    . += HEAP_SIZE;

    __HeapLimit = .;

  } > m_data_sdram

  .stack :

  {

    . = ALIGN(8);

    . += STACK_SIZE;

  } > m_data_sdram

This is not the intended behavior. I would like to have heap and stack placed in the internal SRAM section.

How do I control the placement of heap and stack when the linker file is automatically generated ?

2015_08_04_15_35_14_Hardware_k65_benchmark_Sources_main.c_Kinetis_Design_Studio_C_Users_Peter.png

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marek_neuzil
NXP Employee
NXP Employee

Hello Peter,

You can uncheck the Generate linker file options on the Build Options page. The Linker file will not be updated by Processor Expert and you can modify the file. See also below the option:

Linker_file.png

Best Regards,

Marek Neuzil

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