Hi,
i'm trying to get a demo an TWR_K65 running but faced the following issue:
heap and stack are placed at the last memory area listed in the PE "CPU->Build options" view.
the following lines are from the generated linker script.
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
} > m_data_sdram
.stack :
{
. = ALIGN(8);
. += STACK_SIZE;
} > m_data_sdram
This is not the intended behavior. I would like to have heap and stack placed in the internal SRAM section.
How do I control the placement of heap and stack when the linker file is automatically generated ?
