Hi,
I am using the PK60N512VMD100 tower with processor expert.
I have created a module that uses the DMA to transfer n 16-bit ADC samples to memory. I have set value in data size of the DMATransfer_LDD (which seems to be for the minor loop register) to 2 and transfer count of transfer control to be n. When I choose a value greater than 256, the memory buffers are not filled by the DMA beyond the 256th entry in memory.
It seems that the CITER register related to the major loop register is only 8-bits wide. However, documentation states that it can be as many as 14-bits wide if channel linking is not used on the DMA. Is there an explanation for this? Or am I misreading the K60 manual.
Thanks,
Matty D
Solved! Go to Solution.
Hello,
we are aware of this problem, the fix would be published soon within CW V10.2 update.
In mean-time you can use the hot-fix that I have sent you direcly by email. The forum does not allow me to upload large files.
best regards
Vojtech Filip
Processor Expert Support Team
Hello,
we are aware of this problem, the fix would be published soon within CW V10.2 update.
In mean-time you can use the hot-fix that I have sent you direcly by email. The forum does not allow me to upload large files.
best regards
Vojtech Filip
Processor Expert Support Team
So I gave it a try and the hot fix solved this problem.
Thanks!!
Matty D
Thanks, I will give it a try.
Matthew