How to fill/clear/check p2020 L1 data cache

[Jerry_zhan]

I have a test case on p2020 board

1. Fill the all the 32-Kbyte L1 data cache

2. Some ambient operation like temperature changing

3. Check if the data of L1 data cache changes

My question is 

1. Is there any example code on the step 1 and step3?

2. If i have to code by myself, is this section the right reference "E500CORERRM 11.4 L1 Cache Control"?

3. Is the "Cache Control Instructions" that i shold program to use? like the dcba, dcbf.etc...

4. Is that any recommendation for me to start with the test code? 

[ufedor · Accepted solution]

Please refer to the U-Boot source code:

https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/arch/powerpc/cpu/mpc85xx/s...

Search for "Allocate Initial RAM in data cache"