Hi,
Thanks for support, we made corrections to avoid mixing IO and UART in one FEC. Regarding our design, we would like to have some support to check our CPU IO configurations. Is it possible with your team? or do you have “MCP8309 expert” contact to subcontract this work?
The idea would be to send a table with the different mux choices on CPU IO and to validate this table.
Many thanks,
F.Van Goethem
De : alexander.yakovlev
Envoyé : lundi 15 janvier 2018 06:41
À : VAN-GOETHEM Frederic
Objet : Re: - Re: GPIO access to FEC3 pins using UCC3/UART
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Re: GPIO access to FEC3 pins using UCC3/UART
reply from alexander.yakovlev<https://community.nxp.com/people/alexander.yakovlev?et=watches.email.thread> in PowerQUICC Processors - View the full discussion<https://community.nxp.com/message/977198?commentID=977198&et=watches.email.thread#comment-977198>