Hello, sir, the high level specification of the debug pin shows 4.35-4.97v, but the official recommendation is that vpre (6.5V) is divided by 10k/11k resistors in the circuit. After calculation, the actual high level is about 3.25V, which can not meet the high level range of 4.35-4.97v defined by this pin. What is the final design subject to?
