Dear Weilin,
1. I compared the OTP configuration that read through the "NXP GUI-MIRROR-Mirrors OTP Export".I found that the Fail-safe part of the OTP configuration was inconsistent (Read OTP configuration in Normal & Read OTP configuration after exit Standby). For example, the VCORE monitoring voltage changes from 0.8V to 0.53750V, that is, after entering or exiting the Standby mode, the Fail-safe part of the OTP configuration is modified. Why does this happen?
[A] If the STBY timer expires the VR5510 goes to OFF mode and you need to load the fuses again with the requested data. You have the non-programmed version. Please refer to the Figure 4. in the VR5510 datasheet.
2. Whether the PGOOD and RSTB cannot be released due to the occurrence of VCOREMON_OV, causing the 8sTimer timeout reset VR5510?
[A] You can set the impact of the VCOREMON_OV by setting the VCOREMON_OV_FS_IMPACT bits in the FS_I_OVUV_SAFE_REACTION1 register. By default the VCOREMON_OV_FS_IMPACT bits are set to assert the FS0B and RSTB pins. If you have left it to default, then yes, the VCORE overvoltage will assert the RSTB pin. Impact on the PGOOD due to VCOREMON overvoltage must be defined in the OTP. In the RSTB2PGOOD_OTP bit. Please refer to the section 23.7.2, page 80.
With Best Regards,
Jozef