FS4503 FS0B released only during debug

[aditya_barve]

Hello, 

We are using FS4503 power management IC in one of our projects. 

On trying to release the FS0B after the ABIST and LBIST tests are run, the FS0B is released only when the debug connector is attached. 

When I disconnect the debugger and perform a power on reset, I observe a reset every 50ms, and the execution is stuck. And the FS0B is not released. 

Could you please help with the same?

Thank you,

Aditya

[JozefKozon · Accepted solution]

Hello Aditya,

this looks like the watchdog is resetting the SBC. In debug mode watchdog refresh is not required, but in normal mode a periodic watchdog refresh from an MCU is required. Please refer to the section 12.5.2 in the FS6500-FS4500 datasheet for Watchdog operation.

JozefKozon_0-1674715313086.png

Please confirm if the SBC is in the Debug or Normal mode by measuring voltage on the DEBUG pin.  I guess when you connect the debugger to the SBC, the DEBUG pin is connected to the Vpre pin and the voltage is within the VDEBUG_IL and VDEBUG_IH.

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Disconnecting the debugger, the DEBUG pin should be connected to GND through a pull-down resistor. Have you used a pull-down, pull-up resistor and a capacitor on the DEBUG pin? 

Screenshot_3.png

You can refer to the FRDMFS6523CAEVM-B-SCH-Schematic attached for recommended values.

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With Best Regards,

Jozef

 

 

[aditya_barve]

Hello Jozef, 

Thank you for the advise. 

It is a reset due to watchdog. What I observe currently is, after the INIT_FS state, when I try to clear the FLT_ERR counter through multiple watchdog triggers, the reset is seen.

Clearing of FLT_ERR counter is required to release the FS0B pin. 

Also if I try to set the WD_WINDOW value to 0, similar reset is observed while accessing the register itself. Currently the WD_WINDOW is set to 12. 

However if I monitor the FS0B_SNS sense every time the watchdog is triggered correctly (through a timed event) there is no issue observed but it takes time to release the FS0B pin. 

Please advise me on the same. 

Thank you. 

Aditya

[aditya_barve]

There was an issue during a function call to set the wd_window value. Its functional now and FS0B is released.
I have one following querry,
If watch dog is turned off and the wd_window value is set to 0, will the SBC go back into the INIT_FS state ?

Thank you,
Aditya

[JozefKozon]

Hello Aditya,

If watch dog is turned off and the wd_window value is set to 0, will the SBC go back into the INIT_FS state?

[A] Do you mean, that you have properly refreshed the watchdog during the INIT_FS state and entered NORMAL_WD state? If yes, than you need to send a periodic watchdog refresh. It you have set the WD_WINDOW to 0000, this value will be valid only during the INIT phase. In the NORMAL_WD state will be the WD_WINDOW set to default value 3.0ms.

JozefKozon_0-1675666757113.png

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After each incorrect watchdog refresh, the Watchdog error counter is incremented. 

JozefKozon_4-1675667817265.pngJozefKozon_5-1675667933149.png

With Best Regards,

Jozef

From INIT_FS or from NORMAL_WD state, if the 

[aditya_barve]

Hello,
It appears that on a sbc where FS1B is enabled/ available, for FS0B to be released the test fs1b has to executed atleast once through a spi command.
It is observed that after running and releasing FS1B, the FS0B is released.
Let me know if this behaviour is acceptable.

Thank you,
Aditya