TJA1100 example code

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TJA1100 example code

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shinichitakko
Contributor I

We are using development board with microcontroller and TJA1100. Is there a code for TJA1100 register setting example from Power-on to Link-up?
We already get application hints (AH1310).

best regards,

Shinichi

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8 Replies

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martin_kovar
NXP Employee
NXP Employee

Hello,

I am sending you the codes in the attachment of this post. This is only source codes which are available right now.

Please check.

Regards,

Martin

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2,791 Views
rsating
Contributor III

Have any new examples of code become available in the last 3 years?

There are not yet any examples (that I could find) showing use of 100BASE-T1 and TJA1100 in S32 Design Studio, and no 100BASE-T1 communication blocks in the Simulink Model Based Design Toolbox.  Also no examples for the TJA1100HN Evaluation Board.

We purchased the MPC5775B EVB which has Automotive Ethernet 100BASE-T1, but I'm struggling to understand how to get started with making it work.  A simple "hello world" example would be great.

I looked at the code in the ZIP files, which is interesting.  It covers a lot related to status and configuration, but nothing related to sending and receiving packets of data.

Could anyone let us know where to start with regard to sending and receiving data?

It would be wonderful to have Simulink blocks in a future NXP MBDT release that support 100BASE-T1.

Thanks

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ycardaillac
Contributor III

Hi,

How about 5 years later then?

I was using this driver with my old BSP (using imx6d) I was in kernel 4.1 and now moving to 5.2, I noticed the driver drivers/net/phy/nxp-tja11xx.c which doesn't seems to work as expected, I'm going to reintegrate the old one and hope for it to work, but is there anything new about using TJA1100 with Linux and imx6 boards?

Best regards,

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2,779 Views
rsating
Contributor III

I notice in "Linux_driver_TJA110" the file "nxp.c" has the following code below, suggesting the operating system gets a handle to a "work queue" for sending data, and interrupts are set to alert the operating system to received data.  Is that right?

Given the above, the structures "phy_device" and "phy_queue" seem quite important to understanding how the code works, but they are never defined in the C or H files.

Could anyone provide a S32DS project (or anything) that shows how to fully build this code?  Such that everything is defined, and we can trace through it?

Can anyone help provide header files and libraries we would need to build code in S32DS that would drive the TJA1100 chip? 

It is difficult to get started without more guidance.

= = = = = = = = = 

static int nxp_config_init(struct phy_device *phydev)
{
    . . .

    /* enable all interrupts */
    phydev->interrupts = PHY_INTERRUPT_ENABLED;
    phydev->drv->config_intr(phydev);

    /* Setup and queue a polling function:
    *
    * The phy_queue is normally used to schedule the interrupt handler
    * from interrupt context after an irq has been received.
    * Here it is repurposed as scheduling mechanism for the poll function
    */
    if (((struct nxp_specific_data *)phydev->priv)->poll_setup == 0) {
        cancel_work_sync(&phydev->phy_queue);
        INIT_WORK(&phydev->phy_queue, poll);
        queue_work(system_power_efficient_wq, &phydev->phy_queue);

        ((struct nxp_specific_data *)phydev->priv)->poll_setup = 1;
    }

    . . .
}

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rsating
Contributor III

Is it NOT advisable, not possible, not recommended, to try to use the TJA1100 chip outside Linux? (i.e. FreeRTOS)   Are the resources simply not available? 

Has anyone been able to drive the TJA1100 chip from bare metal C code?  Users of the TJA1100HN evaluation board must be able to drive it somehow, but how?

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rsating
Contributor III

From hints in other posts in the forum, I found an example NXP ethernet driver as part of a larger GIT repository from Freescale that in theory could build successfully:

https://github.com/Freescale/linux-fslc/blob/4.14.x%2Bfslc/drivers/net/ethernet/nxp/lpc_eth.c

And from the #include statements found the header that defines phy_device and phy_queue

https://github.com/Freescale/linux-fslc/blob/4.14.x%2Bfslc/include/linux/phy.h

The code in the ZIP files depends on Linux to do a lot of the footwork (MAC, state machines, etc.) for interaction with the TJA1100 chip.

This suggests it would be a really difficult path to drive the TJA1100 chip from bare metal code.  Wonder if NXP staff can confirm this. 

If the Linux path is advised, is there a reference Linux build shared on GIT that shows the device driver code included in the repository?  I could not find any.

Or could we get a hint, letting us know of a similar device driver integration in a GIT repository we can look to for guidance?

In the file "nxp.c" the call to nxp_config_init(phydev) appears to be the only interface to the outside world. But "lpc_eth.c" found in the Linux GIT repository has quite a different interface, so it is not helpful as an example to follow.

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rsating
Contributor III

Based on the following, a bare metal implementation seems feasible, if the TJA1100 driver code could be integrated with the SDK.  If anyone has a working example, that would be great.

= = = = = = 

From the S32 SDK for PA overview:
https://www.nxp.com/design/software/development-software/s32-sdk/s32-software-development-kit-for-po...

"S32 SDK for Power Architecture supports Ethernet (TCP/IP+LWIP+WOLFSSL)"

From "Lightweight TCP/IP (lwIP) Stack with SDK" on NXP Community Forum:
https://community.nxp.com/t5/Kinetis-Microcontrollers/Lightweight-TCP-IP-lwIP-Stack-with-SDK/ta-p/11...

"run in both bare metal and RTOS environment"

"Suitable for use in embedded system with tens of free RAM and room for around 40 kilobytes of code ROM"

= = = = = = =

lwIP 2.1.2 - Lightweight IP stack

lwIP is a small independent implementation of the TCP/IP protocol suite.

The focus of the lwIP TCP/IP implementation is to reduce the RAM usage
while still having a full scale TCP. This making lwIP suitable for use
in embedded systems with tens of kilobytes of free RAM and room for
around 40 kilobytes of code ROM.

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2,879 Views
DeepakDas
Contributor II

Hi Martin,

Is there any plan to upstream this driver ?

Regards,

Deepak Das

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