Dear Julian,
thank you for the schematic and the scopes. So the too high fall rate is not the reason. 16mV/ms is way lower, than 700mV/ms.
I have two suggestions. Please test them.
1. Please disable the CLKOUT output by the COF[2:0] bits in the CLKOUT register, address 0Fh. This probably will not help, but please test it.


2. This suggestion might solve your issue. How are set the PWRMNG [2:0] bits in the Control_3 register, address 02h? Are they left default?

Please set to bits to 011 to direct switching mode, so the internal operating voltage doesn't drop to Vth(sw)bat, but switches to VBAT supply when the VDD < VBAT.



With Best Regards,
Jozef