I have been able to use MemoryDump to read the p and d flash from chip mc9s12xep768 as detailed in this post:
https://community.nxp.com/t5/OSBDM-and-TBDML/Copying-mc9s12-flash-memory-with-usbdm/m-p/2008312#M399...
It would be interesting if there was a debug version of MemoryDump to see what it is doing.
However I have not been successful verifying with HC12S.
There are a number of things I've noticed.
Firstly it detects cc92 as an id. but according to the table that is not right:

and in this post with a similar chip it was cc94
https://community.nxp.com/t5/OSBDM-and-TBDML/Erasing-and-Flashing-mc9s12xep768/m-p/1754397
If this was so then the way it tries to access might be different causing it to fail. Perhaps this information is in hcs12_devices.xml.
If I unselect what HC12S id chooses and use xep 100 then it starts to read but gives the following message:

Secondly I have checked and a ceramic resonator appears to provide an 8MHz clock which I measured rather approximately on an oscilloscope - so I wondered what is the rate at which the processor BDM communicates with the usbdm device? - it seems 250KHz according to MemoryDump. otherwise if it was 4MHz then maybe my Dupont type leads are not sufficient.
There is only a decoupling capacitor on the reset pin on examination no external watchdog.
This is the message I get when HC12S chooses the processor xep linear cc92
