external oscillator in NTM88 Hi Team, Do we compulsory need to connect external oscillator for NTM88 or internal oscillator is enough to use for sensor measurements.  Board Design Development Board Re: external oscillator in NTM88 𝖧𝗎𝖻𝗎𝗇𝗀𝗂 𝖫𝖺𝗒𝖺𝗇𝖺𝗇 𝖢𝖺𝗅𝗅 𝖢𝖾𝗇𝗍𝖾𝗋 𝖠𝗀𝗈𝖽𝖺 𝖽𝗂 𝗇𝗈𝗆𝗈𝗋: 0811477566. 𝖯𝗎𝗌𝖺𝗍 𝖡𝖺𝗇𝗍𝗎𝖺𝗇 𝖯𝖾𝗅𝖺𝗇𝗀𝗀𝖺𝗇 𝖠𝗀𝗈𝖽𝖺 𝖱𝖾𝗌𝗆𝗂 𝖧𝗎𝖻𝗎𝗇𝗀𝗂 𝖶𝗁𝖺𝗍𝗌𝖠𝗉𝗉: +62 811477566. Re: external oscillator in NTM88 External crystal oscillators are not mandatory, but they are recommended for use in scenarios where high-precision RF communication or a more stable clock source is required. You can decide whether to connect an external crystal oscillator based on the specific application requirements.

Issue with sw1 regulator Hi, I hope this message finds you well. We are currently working with the PF5020 in (TBB) mode SW1 regulator, and we have encountered an issue. While writing to the SW1 RUN VOLT register, the values do not appear to be reflected on the SW1LX pin as expected. Could you please provide guidance on why this might be happening or suggest any troubleshooting steps we should follow to resolve this issue? And please provide sw1 regulator configuration sequence. Best regards, [Shivani] Re: Issue with sw1 regulator If you want to operate TBB mode please use our recommend socket board or EVB and use the special timing to enter into TBB mode then update the registers. PF502x Programming Board | NXP Semiconductors For more detail  you can read  attached file from page21--- 7.2 Operating in TBB mode

WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hello, I am working on the i.MX8ULP  and trying to use the WDOG32 in interrupt mode before it triggers a reset. Even though I have configured the watchdog with interrupt enabled, it is still behaving as a normal watchdog — it resets the system directly without generating an interrupt. void WDOG0_IRQHandler(void) { PRINTF("Watchdog IRQ triggered! Count = %u\r\n", wdog_irq_count); /* Clear interrupt flag */ WDOG32_ClearStatusFlags(WDOG0, kWDOG32_InterruptFlag); wdog_irq_count++; SDK_ISR_EXIT_BARRIER; } /* Get default configuration */ WDOG32_GetDefaultConfig(&config); /* Enable interrupt mode */ config.enableInterrupt = true; config.timeoutValue = WDOG_TIMEOUT_VALUE; NVIC_EnableIRQ(WDOG0_IRQn); for (temp = 0; temp < DELAY_TIME; temp++) { __NOP(); } /* Initialize WDOG32 with config */ WDOG32_Init(WDOG0, &config); while(1) { } I have attached full wdog32.c file also in that watchdog IRQ i have put watchdog refresh but still it is resetting after timeout occurs. Are there any additional initialization needed for WDOG32 interrupt mode and in this i only required interrupt not reset is it possible? i.MX8ULP Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, @Bio_TICFSL  Have you checked with the EVK to bootup on 0.9V when watchdog is resetting?  Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, @Bio_TICFSL  I have tested with the EVK using the watchdog example code at the default high frequency, and it boots fine. However, when I lower the voltage to 0.9V  (as in my earlier code snippet), after a watchdog timeout occurs the core gets stuck during bootup. If you have tested this on the EVK at 0.9V. Could you please share the exact code/configuration that you used on the EVK for this test? Regards, Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, The code is fine I just looking something that decrease the voltage, because  ~9.0 volts boot ok with the EVK. Regards Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hii, @Bio_TICFSL  status = UPOWER_ChngRTDDomBias(DRIVE_MODE_UD); assert(status == 0); status = UPOWER_ChngPmicVoltage(PMIC_BUCK2, PMIC_VOLTAGE_0_9V); if (status == 0) { status = UPOWER_GetPmicVoltage(PMIC_BUCK2, &voltage); if (status == 0 && voltage == PMIC_VOLTAGE_0_9V) { // success } else { assert(false); } } else { assert(false); } During debugging I found that: When the PMIC is set to 0.9V in ARBB mode, after a watchdog reset the core gets stuck during boot. If I increase the PMIC voltage to 1.0V or 1.1V, the reset and boot work fine, even at lower frequencies. I need to keep the PMIC voltage at 0.9V to save power, but with this setting the system cannot reliably boot after a watchdog reset. 👉 What might be causing this issue at 0.9V, and are there any recommended changes or workarounds to ensure the core can boot properly after a reset at this voltage? Any help or guidance would be appreciated. Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP On the Cortex-M33 of the i.MX8ULP, I have configured the M33 core to run in ARBB mode. When the watchdog timeout occurs, it tries to reset the core. However, during the reboot process the core seems to get stuck, because before the reset the code had switched the M33 into ARBB mode, which runs at a lower frequency. What modifications are required so that if the core is running in ARBB mode and a watchdog reset occurs, it can successfully boot up again? Re: WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hii, @Bio_TICFSL  I am able to use the watchdog in non-interrupt mode, and it is resetting the system as expected. However, I require the watchdog interrupt mode, and I am not sure about the correct configuration steps for enabling and handling the interrupt. Can you please guide me on how to enable WDOG32 in interrupt mode so that my code actually enters the WDOG32 IRQ handler before reset? Re: WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hello, Yes, it should be possible according to Reference Manual, look at chapter 9.1.7 Power mode details (real-time domain): As you can see all the necessary components to WDOG0 are available during ARBB mode, but maybe there is the possibility that uPower is gating clock of this WDOG or maybe of entire PBRIDGE0. Please take a look to the uPower Firmware User's Guide. Regards

WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hello, I am working on the i.MX8ULP  and trying to use the WDOG32 in interrupt mode before it triggers a reset. Even though I have configured the watchdog with interrupt enabled, it is still behaving as a normal watchdog — it resets the system directly without generating an interrupt. void WDOG0_IRQHandler(void) { PRINTF("Watchdog IRQ triggered! Count = %u\r\n", wdog_irq_count); /* Clear interrupt flag */ WDOG32_ClearStatusFlags(WDOG0, kWDOG32_InterruptFlag); wdog_irq_count++; SDK_ISR_EXIT_BARRIER; } /* Get default configuration */ WDOG32_GetDefaultConfig(&config); /* Enable interrupt mode */ config.enableInterrupt = true; config.timeoutValue = WDOG_TIMEOUT_VALUE; NVIC_EnableIRQ(WDOG0_IRQn); for (temp = 0; temp < DELAY_TIME; temp++) { __NOP(); } /* Initialize WDOG32 with config */ WDOG32_Init(WDOG0, &config); while(1) { } I have attached full wdog32.c file also in that watchdog IRQ i have put watchdog refresh but still it is resetting after timeout occurs. Are there any additional initialization needed for WDOG32 interrupt mode and in this i only required interrupt not reset is it possible? i.MX8ULP Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, @Bio_TICFSL  Have you checked with the EVK to bootup on 0.9V when watchdog is resetting?  Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, @Bio_TICFSL  I have tested with the EVK using the watchdog example code at the default high frequency, and it boots fine. However, when I lower the voltage to 0.9V  (as in my earlier code snippet), after a watchdog timeout occurs the core gets stuck during bootup. If you have tested this on the EVK at 0.9V. Could you please share the exact code/configuration that you used on the EVK for this test? Regards, Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hi, The code is fine I just looking something that decrease the voltage, because  ~9.0 volts boot ok with the EVK. Regards Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP Hii, @Bio_TICFSL  status = UPOWER_ChngRTDDomBias(DRIVE_MODE_UD); assert(status == 0); status = UPOWER_ChngPmicVoltage(PMIC_BUCK2, PMIC_VOLTAGE_0_9V); if (status == 0) { status = UPOWER_GetPmicVoltage(PMIC_BUCK2, &voltage); if (status == 0 && voltage == PMIC_VOLTAGE_0_9V) { // success } else { assert(false); } } else { assert(false); } During debugging I found that: When the PMIC is set to 0.9V in ARBB mode, after a watchdog reset the core gets stuck during boot. If I increase the PMIC voltage to 1.0V or 1.1V, the reset and boot work fine, even at lower frequencies. I need to keep the PMIC voltage at 0.9V to save power, but with this setting the system cannot reliably boot after a watchdog reset. 👉 What might be causing this issue at 0.9V, and are there any recommended changes or workarounds to ensure the core can boot properly after a reset at this voltage? Any help or guidance would be appreciated. Re: WDOG32 on ARBB mode of cortex-M33 after reset bootup issue on i.MX8ULP On the Cortex-M33 of the i.MX8ULP, I have configured the M33 core to run in ARBB mode. When the watchdog timeout occurs, it tries to reset the core. However, during the reboot process the core seems to get stuck, because before the reset the code had switched the M33 into ARBB mode, which runs at a lower frequency. What modifications are required so that if the core is running in ARBB mode and a watchdog reset occurs, it can successfully boot up again? Re: WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hii, @Bio_TICFSL  I am able to use the watchdog in non-interrupt mode, and it is resetting the system as expected. However, I require the watchdog interrupt mode, and I am not sure about the correct configuration steps for enabling and handling the interrupt. Can you please guide me on how to enable WDOG32 in interrupt mode so that my code actually enters the WDOG32 IRQ handler before reset? Re: WDOG32 Interrupt Not Triggering Before Reset on i.MX8ULP Hello, Yes, it should be possible according to Reference Manual, look at chapter 9.1.7 Power mode details (real-time domain): As you can see all the necessary components to WDOG0 are available during ARBB mode, but maybe there is the possibility that uPower is gating clock of this WDOG or maybe of entire PBRIDGE0. Please take a look to the uPower Firmware User's Guide. Regards

MBDT 何时支持 RTD 6.0.0 和 S32DS 3.6？ 我需要使用 S32K3 TCP/IP 协议栈 3.0.0、它基于 RTD 6.0.0 和 S32DS 3.6。 目前，MBDT 的最新版本是 1.6.0、基于 RTD 5.0.0 和 S32DS 3.5。 请问是否计划让 MBDT 支持 RTD 6.0.0 和 S32DS 3.6，这样我就可以在自定义代码中调用 TCP/IP 3.0.0？ 感谢您处理此事。 Re: When will MBDT support RTD 6.0.0 and S32DS 3.6? 你好，@pro778tw、 感谢您对 S32K3 基于模型的设计工具箱的关注。 将在本季度末发布的下一个工具箱版本（ MBDT S32K3 版本 1.7.0）中增加对 RTD 6.0. 0 和 S32DS 3.6 的支持。 顺祝商祺！ 德拉古

GTM Configure Tools license request Hi everyone, I'm trying to apply for a license for the GTM configure tools. When sending the relevant email to complete the process, I encountered a "Delivery incomplete" error from Gmail. The system shows there was a temporary problem delivering the message, and Gmail will retry for 20 more hours. But I'm worried this might affect the license application progress. Has anyone else faced a similar email delivery issue when applying for this license? How did you resolve it? Any suggestions on what I can do to make sure the email gets through successfully would be really appreciated. Thanks in advance!   Re: GTM Configure Tools license request Hello, Try it now. I was able request add GTM SW to your account. You should see it now in your NXP account. Best regards, Peter Re: GTM Configure Tools license request @petervlna  Thank you so much for your quick response and willingness to help resolve my GTM access issue—it’s really appreciated! Best regards Re: GTM Configure Tools license request Hello, Unfortunately admin is out of office and I have no info when he will be back. Could you please rise a request to : [email protected] for adding your account to access for GTM download / license access? Best regards, Peter Re: GTM Configure Tools license request Hello, OK, I will inform you once to access is successfully added. Best regards, Peter Re: GTM Configure Tools license request @petervlna  Thank you for your prompt response and assistance. I would like to request access to the GTM folder for the license using my email account: [email protected]. Please let me know if any further information is needed from my side to complete this process. I appreciate your help in coordinating with the admin to add the necessary permissions. Best regards Re: GTM Configure Tools license request Hello, Looks like you do not have access to the GTM. From what email account you would like to get access to GTM folder for license? I will ask admin to add the right for you. Best regards, Peter Re: GTM Configure Tools license request @petervlna  When I download other software from NXP, the process correctly redirects me to the Product List interface as shown in your previous image. However, when I attempt to download the GTM Configure Tools, it does not redirect to that Product List interface. Instead, it redirects to a different interface (as described below/attached). Thank you for your assistance.   Best regards,   Re: GTM Configure Tools license request Hello, The only reason could be that you do not have access to that SW. You can try manually find it in product list under NXP Software: Best regards, Peter Re: GTM Configure Tools license request  @petervlna  I've already downloaded the GTM configuration tools from the website you mentioned and installed it. But I'm wondering where the license download button you mentioned is. Also, on this interface, there's no display of the license key you referred to, and I can't find it through search either. Do you know what might be causing this? Re: GTM Configure Tools license request Hello, Licenses can be obtained via the https://www.nxp.com/gtmconfigtool website. If you are a new to the website, you will need to create a login account. Both trial and permanent licenses can be generated from there. For a trial license, select the 'Download' button. For the permanent license, select the 'Buy' button. You will be presented with an option to generate a license on the 'License Keys' tab on the Product Download page. Thereafter, you can proceed to 'My Account' and then 'Software Licensing and Support' to maintain your licenses and access updated product downloads. Actually the above statement is not fully true as I had to go via NXP SW account to the GTM to be able to download the license. The online request via GTM tool for license is not working for many years, as the email is sent to freescale email address which no longer exists. Best regards, Peter

I3C Does the LPCXpresso860-MAX development board support the DDR mode of I3C ?

RT1170EV 呼び出し: MCU C++ リンカー arm-none-eabi-c++ -nostartfiles -nodefaultlibs -nostdlib -mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard -mthumb -T evkbmimxrt1170_freertos_generic_cm7_Debug.ld -o "evkbmimxrt1170_freertos_generic_cm7.axf"./xip/dcd.o./xip/evkbmimxrt1170_flexspi_nor_config.o ./xip/fsl_flexspi_nor_boot.o ./xip/xmcd.o ./utilities/str/fsl_str.o ./utilities/debug_console_lite/fsl_debug_console.o ./utilities/fsl_assert.o ./utilities/fsl_memcpy.o ./startup/boot_multicore_slave.o ./startup/startup_mimxrt1176_cm7.o ./source/freertos_generic.o ./source/semihost_hardfault.o ./freertos/freertos-kernel/ポータブル/MemMang/heap_4.o ./freertos/freertos-kernel/ポータブル/GCC/ARM_CM4F/port.o ./freertos/freertos-kernel/croutine.o ./freertos/freertos-kernel/event_groups.o ./freertos/freertos-kernel/list.o ./freertos/freertos-kernel/queue.o ./freertos/freertos-kernel/stream_buffer.o ./freertos/freertos-kernel/tasks.o ./freertos/freertos-kernel/timers.o ./freertos/FreeRTOSAddons/cpp/Source/ccondition_variable.o ./freertos/FreeRTOSAddons/cpp/Source/cevent_groups.o ./freertos/FreeRTOSAddons/cpp/Source/cmem_pool.o ./freertos/FreeRTOSAddons/cpp/Source/cmutex.o ./freertos/FreeRTOSAddons/cpp/Source/cqueue.o ./freertos/FreeRTOSAddons/cpp/Source/cread_write_lock.o ./freertos/FreeRTOSAddons/cpp/Source/csemaphore.o ./freertos/FreeRTOSAddons/cpp/Source/ctasklet.o ./freertos/FreeRTOSAddons/cpp/Source/cthread.o ./freertos/FreeRTOSAddons/cpp/Source/ctickhook.o ./freertos/FreeRTOSAddons/cpp/Source/ctimer.o ./freertos/FreeRTOSAddons/cpp/Source/cworkqueue.o ./freertos/FreeRTOSAddons/c/Source/dlist.o ./freertos/FreeRTOSAddons/c/Source/mem_pool.o ./freertos/FreeRTOSAddons/c/Source/queue_simple.o ./freertos/FreeRTOSAddons/c/Source/read_write_lock.o ./freertos/FreeRTOSAddons/c/Source/slist.o ./freertos/FreeRTOSAddons/c/Source/stack_simple.o ./freertos/FreeRTOSAddons/c/Source/workqueue.o ./freertos/FreeRTOSAddons/c/Source/zero_copy_queue.o ./ドライバ/fsl_anatop_ai.o ./ドライバ/fsl_cache.o ./ドライバ/fsl_clock.o ./ドライバ/fsl_common.o ./ドライバ/fsl_common_arm.o ./ドライバ/fsl_dcdc.o ./ドライバ/fsl_gpc.o ./ドライバ/fsl_gpio.o ./ドライバ/fsl_lpuart.o ./ドライバ/fsl_mu.o ./ドライバ/fsl_pgmc.o ./ドライバ/fsl_pmu.o ./ドライバ/fsl_soc_src.o ./device/system_MIMXRT1176_cm7.o ./component/uart/fsl_adapter_lpuart.o ./board/board.o ./board/clock_config.o ./board/hardware_init.o ./board/pin_mux.o D:/nxp/MCUXpressoIDE_25.6.136/ide/plugins/com.nxp.mcuxpresso.tools.win32_25.6.0.202501151204/tools/bin/../lib/gcc/Arm-none-eabi/14.2.1/../../../../Arm-none-eabi/bin/ld.exe: 警告: evkbmimxrt1170_freertos_generic_cm7.axf には RWX 権限を持つ LOAD セグメントがあります D:/nxp/MCUXpressoIDE_25.6.136/ide/plugins/com.nxp.mcuxpresso.tools.win32_25.6.0.202501151204/tools/bin/../lib/gcc/Arm-none-eabi/14.2.1/../../../../Arm-none-eabi/bin/ld.exe: ./xip/fsl_flexspi_nor_boot.o:(.boot_hdr.ivt+0x10):undefined reference to `__boot_hdr_boot_data_loadaddr__' D:/nxp/MCUXpressoIDE_25.6.136/ide/plugins/com.nxp.mcuxpresso.tools.win32_25.6.0.202501151204/tools/bin/../lib/gcc/Arm-none-eabi/14.2.1/../../../../Arm-none-eabi/bin/ld.exe: ./xip/fsl_flexspi_nor_boot.o:(.boot_hdr.ivt+0x14): `__boot_hdr_ivt_loadaddr__' への未定義の参照 collect2.exe:エラー: ld は 1 の終了ステータスを返しました メイク[1]: *** [メイクファイル:82: evkbmimxrt1170_freertos_generic_cm7.axf]エラー1 make: *** [makefile:73: all] エラー 2 「make -r -j8 all」は終了コード 2 で終了しました。ビルドが不完全である可能性があります。 ===================================================== 「アプリケーションを RAM にリンク」を選択すると、上記のエラーが発生します。選択されていない場合はエラーは報告されません Re: RT1170EV こんにちは@yanpingzhuさん 追加情報をありがとうございます。これは、C ファイルと CPP ファイルを管理するための IDEs のリンク スクリプトの違いによるものと思われます。次の 2 つのマクロ定義は手動で変更する必要があります。これはコンパイルされて成功します。 よろしくお願いします、 ギャビン Re: RT1170EV ご回答ありがとうございます Cコンパイラを使用して「アプリケーションをRAMにリンク」を選択した場合にはエラーは発生しません。C++コンパイラを使用して「アプリケーションをRAMにリンク」を選択した場合にのみエラーが発生します。 Re: RT1170EV こんにちは@yanpingzhuさん NXP MIMXRTシリーズにご興味をお持ちいただきありがとうございます。 提供されたエラー メッセージから、問題はリンク スクリプト内の `__boot_hdr_ivt_loadaddr __' and `__ boot_hdr_boot_data_loadaddr__' によって発生しているようです。 ただし、Link-to-RAM は XIP イメージを生成しないため、IDEs の車載生成スクリプトは異なり、boot_hdr セクションが含まれません。したがって、「リンカー スクリプトの管理」がチェックされていることを確認し、クリーンアップしてから再度コンパイルしてください。

[S32K388] BIST Prerequisite Details Clarifications Hi Team, Customer is looking for some clarifications about information updated in latest version of the SAF/SPD Bist User Manual: Looking into the newer version SAF BIST documentation, this is now the wording mentioned: 1) Is this an incorrect statement for the S32K388 device. Reading this as stated, it seems to imply that for the S32K388 it is recommended to run the BIST on CM7_0 core. This seems to be in stark contrast with what your device safety manual is suggesting that all safety checks should be running on the master safety core (AOU_SW_SAFETY_CORE_USAGE), and the master safety core is defined as CM7_2 core on the S32K388. 2) Can you address the below questions for clarification: Is it mandatory that the cores that the BIST is NOT executing on are "disabled", or just a recommendation?  Does "disabled" here mean the cores are literally halted in hardware and are not at all executing, or if they are simply in a software wait loop with all interrupts disabled and waiting for the BIST to be completed good enough?  If it really needs to be halted in hardware, does this effectively exclude the option for me to enable those cores to start automatically through the IVT boot configuration word, and instead have to keep those cores off until after the BIST has executed (and I'd have to develop a software strategy for manually starting the other cores)? Thanks, Daniel V. Safety_SW Re: [S32K388] BIST Prerequisite Details Clarifications Hello Daniel, customer is right about what is master safety core on K388, it will be fixed in BIST UM. As per Safety architects, it doesn't necessarily mean it must be CM7_2, if customer wants to run ASIL_D on CM7_0, and has K388_LS chip variant it is possible to consider CM7_0 as master safety core and run SAF from that core. Second question is HW related, but simple answer is to keep the other cores in reset, which should be default state. Typically which cores are enabled is set in startup in Boot Configuration Word as customer mentioned, so yes to run online BIST on K3 requires to run the other cores after BIST within customer SW - I think using MCU driver via Mcu_SetMode(). It's a good question whether it should be enough to put the other cores into SleepMode or some loop where it will do nothing, but this use case is not validated - HW team need to confirm. My understanding is that BIST is accessing some HW and Memories which can be used by other cores (check RM e.g. for instruction and data cache blocks covered be MBIST) if there would be some app running so it would corrupt correct BIST execution. Kind Regards, Radoslav

sBoot NCF 测试 - 反应配置 您好， 在目前的配置中，eMcem 模块中的 R1 反应配置了少数 FCCU 故障。 在 sBoot 中配置 FCCU 测试时，无法使用 R1 配置。只有 R1_R2 可用。 为 R1_R2 配置时，预计将启用 NMI，这将导致当前应用程序的 RESET。 如何仅为 sBoot FCCU NCF 测试配置 R1？ SAF 版本：SW32G_SAF_2.0.2_QLP01_D2410 Re: sBoot NCF test - Reaction configurations 你好，@Irshad2225 谢谢你的帖子。 我刚刚检查了 sBoot 的代码。 没有只定义 R1 反应，因此不能将其设置为 R1 对您的不便，我深表歉意。 BR 切宁  

S32k3の外部GPIO割り込みの例 こんにちは、 S32K3X4EVB-Q172のプッシュボタンSW5を使用して、単純な外部GPIO割り込みを実行しようとしています。 私はhttps://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/SIUL2-external-interrupt-example-project-using-S32K3-RTD-without/ta-p/1552335に従っています。 これはメインファイルです しかし、「 SIUL2_ICU_IP_INSTANCE」が宣言されていないというエラーが発生し、他のエラーも発生します SIUL2 INSTANCEは0に設定されていますが、該当するファイルでは更新されていません 設定で何かが足りないのでしょうか？ S32K3X4EVB-Q172ボードでプッシュボタンとLEDトグルを使用したGPIO割り込みについて、これまたは利用可能な例を誰か助けてくれませんか？ プロジェクト フォルダーは下記に添付されています。RTD 5.0.0 を使用しています。 Re: External GPIO interrupt example in S32k3 こんにちは@AntoZ この HOWTO は RTD バージョン 2.0.0 を使用して実装され、その後のリリースでいくつかの変更が導入されました。その結果、新しいバージョンの手順に従うと、いくつかの矛盾が生じる可能性があります。 予期される構成パラメータの不一致により、Siul2_Icu_Ip_Init() 関数のエラー メッセージが表示されます。関数に渡されたパラメータは予期された名前では存在しません。別の識別子で生成されました。 たとえば、 Siul2_Icu_Ip_0_Config_PB_BOARD_InitPeripheralsを使用する代わりに。以下を使用する必要があります: Siul2_Icu_Ip_0_Config_PB 。この正しい設定はSiul2_Icu_Ip_SA_PBcfg.hにあります。ファイル。 より良い参考のために、Siul2_Icu_Ip_BlinkLed_S32K344 の例を確認することをお勧めします。これは、HOWTO で説明されているものと同じアプリケーションを実装します。この例はRTDパッケージに含まれており、例から新しいプロジェクトを作成するときに簡単にアクセスできます。 BR、ヴェインB

FRDM-MCXA156: FlexPWM not working as intended Hello, I'm trying to use the FlexPWM peripheral of the MCXA156 SoC in a FRDM_MCXA156 devboard using Zephyr but I can't get it to fully work. Whatever I try, the pulse and period seen in the associated output pins do not correspond with the values I am assigning it. I have found a way to reproduce the issue using the blinky_pwm example. Using the reproduction steps below I only get a small pulse of less than 1ms in pin P3_6 (where channel 0 of flexpwm0_pwm0 is linked) whenever the PWM is reconfigured, but nothing in between. AFAIK the example should be setting a 50% duty cycle signal and that is not what I am seeing. It is not a regression; I've tried the same thing on a semi-recent commit 0d46a93 and commit 9f6fdae (Where PWM was implemented for the FRDM_MCXA156 board) and the issue still happens. Steps to reproduce: west init repro cd repro && west update Copy the following overlay file to samples/basic/blinky_pwm/boards/frdm_mcxa156.overlay: #include / { pwmleds { compatible = "pwm-leds"; pwm_led_0: pwm_led_0 { pwms = <&flexpwm0_pwm0 0 PWM_MSEC(1) PWM_POLARITY_NORMAL>; label = "PWM LED 0"; }; }; aliases { pwm-led0 = &pwm_led_0; pwm-0 = &flexpwm0_pwm0; }; }; Then: cd zephyr && west build -b frdm_mcxa156 samples/basic/blinky_pwm west flash See incorrect behavior when probing P3_6. Logs don't show much: [00:00:00.000,069] <dbg> pwm_mcux: pwm_mcux_init: Set prescaler 128, reload mode 2 *** Booting Zephyr OS build v4.2.0-2444-g0d46a934171a *** PWM-based blinky Calibrating for channel 0... [00:00:00.017,179] <err> pwm_mcux: Too long period (750000), adjust pwm prescaler! [00:00:00.025,412] <err> pwm_mcux: Too long period (375000), adjust pwm prescaler! [00:00:00.033,645] <err> pwm_mcux: Too long period (187500), adjust pwm prescaler! [00:00:00.041,879] <err> pwm_mcux: Too long period (93750), adjust pwm prescaler! Done calibrating; maximum/minimum periods 62500000/7812500 nsec Using period 62500000 Using period 31250000 Using period 15625000 Using period 7812500 Using period 15625000 Using period 31250000 ... Attached is the (compressed) ELF final binary I got doing these steps. I hope this is just a mistake on my side. Appreciate any feedback on this matter! Thanks in advance Re: FRDM-MCXA156: FlexPWM not working as intended Hi @aperea-cc, Thanks for the suggestions of documenting this somewhere on the Zephyr driver. I will pass it on to the Zephyr team for their consideration. Re: FRDM-MCXA156: FlexPWM not working as intended Hello, Thank you very much for your response and support. Yesterday I did the same thing (Comparing with the example from the official NXP SDK) and ended up noticing that the FlexPWM peripheral only works if the CPU is active. That would explain why in Zephyr doesn't work, since it sleeps for 4 seconds after every PWM configuration. I don't think there's any elegant solution for this problem in Zephyr, since we'd need the CPU busy if we want the PWM to work, so I'm figuring out if the same behaviour I want can be reproduced using FlexIO instead. From reading the reference manual it seems that FlexPWM is the only non-CPU-related peripheral that exhibits this behavior. It's in the same power management category as the watchdog, cache controller or CPU itself. Maybe this could be documented in the Zephyr driver somewhere; I think it'd save a lot of time to newcomers to the SoC. Re: FRDM-MCXA156: FlexPWM not working as intended Hi @aperea-cc, I imported the blinky_pwm example code from the Zephyr repository and added the overlay that you shared. Indeed, the P3_6 pin outputs small pulses instead of actual PWM signals. After this test, I imported the normal pwm example (without Zephyr) and it worked properly with P3_6. This proves that the issue is not hardware, but rather software related. I will continue investigating whether the issue is on application level or on driver level on the Zephyr example. If you have any further developments, let me know. BR, Edwin.

External GPIO interrupt example in S32k3 Hi there, I'm trying to execute simple external GPIO interrupt in S32K3X4EVB-Q172 using push button SW5 I'm followed the https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/SIUL2-external-interrupt-example-project-using-S32K3-RTD-without/ta-p/1552335 This is main file But i'm getting an error as "SIUL2_ICU_IP_INSTANCE" not declared and other errors too SIUL2 INSTANCE is configured as 0 but its not updated in respected file Am I missing something in configuration, Can anyone help this or any example available for GPIO interrupt with push button and led toggle with S32K3X4EVB-Q172 board The project folder is attached bellow , I'm using RTD 5.0.0. Re: External GPIO interrupt example in S32k3 Hi @AntoZ  This HOWTO was implemented using RTD version 2.0.0, and several changes have been introduced in subsequent releases. As a result, some discrepancies may appear when following the instructions with newer versions. The Siul2_Icu_Ip_Init() function error message is displayed due to a mismatch in the expected configuration parameter. The parameter passed to the function does not exist under the expected name—it was generated with a different identifier. For example, instead of using: Siul2_Icu_Ip_0_Config_PB_BOARD_InitPeripherals. You should use: Siul2_Icu_Ip_0_Config_PB. This correct configuration can be found in the Siul2_Icu_Ip_SA_PBcfg.h file. For better reference, I recommend reviewing the Siul2_Icu_Ip_BlinkLed_S32K344 example. It implements the same application as described in the HOWTO. This example is included with the RTD package and can be easily accessed when creating a new project from an example BR, VaneB

External GPIO interrupt example in S32k3 Hi there, I'm trying to execute simple external GPIO interrupt in S32K3X4EVB-Q172 using push button SW5 I'm followed the https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/SIUL2-external-interrupt-example-project-using-S32K3-RTD-without/ta-p/1552335 This is main file But i'm getting an error as "SIUL2_ICU_IP_INSTANCE" not declared and other errors too SIUL2 INSTANCE is configured as 0 but its not updated in respected file Am I missing something in configuration, Can anyone help this or any example available for GPIO interrupt with push button and led toggle with S32K3X4EVB-Q172 board The project folder is attached bellow , I'm using RTD 5.0.0. Re: External GPIO interrupt example in S32k3 Hi @AntoZ  This HOWTO was implemented using RTD version 2.0.0, and several changes have been introduced in subsequent releases. As a result, some discrepancies may appear when following the instructions with newer versions. The Siul2_Icu_Ip_Init() function error message is displayed due to a mismatch in the expected configuration parameter. The parameter passed to the function does not exist under the expected name—it was generated with a different identifier. For example, instead of using: Siul2_Icu_Ip_0_Config_PB_BOARD_InitPeripherals. You should use: Siul2_Icu_Ip_0_Config_PB. This correct configuration can be found in the Siul2_Icu_Ip_SA_PBcfg.h file. For better reference, I recommend reviewing the Siul2_Icu_Ip_BlinkLed_S32K344 example. It implements the same application as described in the HOWTO. This example is included with the RTD package and can be easily accessed when creating a new project from an example BR, VaneB

链接服务器错误：没有可用端口 我们有一个 MIMXRT798S 板，我们正在尝试使用 McuLink。我们从 NXP 网站下载了 Linux 版 Linkserver 25.7.33。当我们运行它时，会收到一条错误信息 /usr/local/LinkServer/LinkServer gdbserver MIMXRT798S:EDNA INFO: Exact match for MIMXRT798S:EDNA found INFO: Selected device MIMXRT798S:EDNA CRITICAL: Critical error ERRMSG: launcher.core.utils.NoFreePortError: No available port in range 11111:11211 for host 您能帮助我们解决这个问题吗？谢谢。 开发板 Re: LinkServer error: No available port 你好@TaliB i.MX RT700 仍在试生产中，因此，我只想提醒您，您的主要支持渠道是您的直接恩智浦代表。 你是本机运行 Linux 还是在虚拟机中运行？另外，你在使用哪个发行版？ 我看到您正在运行 GDB 服务器命令。我不知道您的操作系统是否存在这个问题。我们可以通过测试其他链接服务器命令来缩小问题范围。您可以尝试使用 LinkFlash 图形用户界面轻松测试其他命令。 谢谢、 迪亚戈

RT I.MX 1172 Secure RM and application note can not be found Hello all currently ,we are developing the project based on I.MX RT 1172. When we want refer tohe Secure Reference manual, we didn't find the source in the RT1172 page. and the secure debug application note and other application is also not found in anywhere. Cloud someone can tell me how to get the latest RT1172 Secure RM and RT1172 related application note? Re: RT I.MX 1172 Secure RM and application note can not be found Thanks for your updated information, Have you tried applying for additional permissions? Best Regards Re: RT I.MX 1172 Secure RM and application note can not be found I  think I should have the right to access the secure file. Because we have signed the NDA. the RT is also checked and granted from the secure file page.(refer to the below image.) Therefore, I don't how to download the this file.(We also contact the NXP FAE, he is also can not find and get this SRM of RT1172, cloud you please check it how to get the SRM of the RT1172? ) Re: RT I.MX 1172 Secure RM and application note can not be found Hi @Yiming2 , Thank you so much for your interest in our products and for using our community. I think you have no secure access rights, please check the following link. https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu Re: RT I.MX 1172 Secure RM and application note can not be found this is the page which I try to find the SRM. But there is empty. https://www.nxp.com/products/i.MX-RT1170

RT I.MX 1172 Secure RM and application note can not be found Hello all currently ,we are developing the project based on I.MX RT 1172. When we want refer tohe Secure Reference manual, we didn't find the source in the RT1172 page. and the secure debug application note and other application is also not found in anywhere. Cloud someone can tell me how to get the latest RT1172 Secure RM and RT1172 related application note? Re: RT I.MX 1172 Secure RM and application note can not be found Thanks for your updated information, Have you tried applying for additional permissions? Best Regards Re: RT I.MX 1172 Secure RM and application note can not be found I  think I should have the right to access the secure file. Because we have signed the NDA. the RT is also checked and granted from the secure file page.(refer to the below image.) Therefore, I don't how to download the this file.(We also contact the NXP FAE, he is also can not find and get this SRM of RT1172, cloud you please check it how to get the SRM of the RT1172? ) Re: RT I.MX 1172 Secure RM and application note can not be found Hi @Yiming2 , Thank you so much for your interest in our products and for using our community. I think you have no secure access rights, please check the following link. https://www.nxp.com/support/support/secure-access-rights:SEC-ACCESS Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu Re: RT I.MX 1172 Secure RM and application note can not be found this is the page which I try to find the SRM. But there is empty. https://www.nxp.com/products/i.MX-RT1170

这是否能用于重写 OFDMA TF 文件？ 我有三个 TF 文件（TF_Config_20MHz.txt、TF_Config_40MHz.txt、TF_Config_80MHz.txt）。 是否可以重写 TF 文件的内容或添加新的 TF 文件？ 20 MHz 和 40 MHz 带宽以全音输出， ，但 80 MHz 带宽似乎以 106 音输出。 我还需要将费率调整为最差费率。 在此先表示感谢。 Re: Is this able to OFDMA TF-Files of Rewrite? 你好，Christine_Li 非常感谢你的回复。 我会考虑的。 Re: Is this able to OFDMA TF-Files of Rewrite? 你好，@kazus 我在我们的 LABTOOL_SDK-2.0.0.39.0 中查看了最新版本，是的，您说得没错，默认的20MHz 和 40MHz 带宽输出的是全音。 对于 20MHz：TrigUserInfoField=5;0；61;1;0;0;0;80，根据图 14。UM11749 中20 MHz 带宽的 RU 索引值，此处为 61表示使用全音调。 对于 40MHz：TrigUserInfoField=5;0；65;1;0;0;0;80，根据图 15。UM11749 中40 MHz 带宽的 RU 索引值，此处 65 表示使用全音。 但在默认情况下，80 兆赫的输出有 26 个音调 对于 80MHz：TrigUserInfoField=5;0；0;1;0;0;0;80，根据图 16。UM11749 中 80 MHz 频率的 RU 指数值，红色 0 表示使用 26 个音调。 如果您想改为使用全音调，请将该段从 0 改为67. 要调整速率，可以编辑 TrigUserInfoField 中的第五段。我认为默认 .txt20MHz、40MHz 和 80MHz 的文件，我们已经在使用最差的文件：MCS0。 如果要更改为其他 MCS 数据速率，如 MCS 7 数据速率，可将第五段改为 7，如下所示： TrigUserInfoField=5;0；3;1;7;0;0;80//RU 设置为 3， MCS 设置为 7 以上红色字体为 RU 指数（用于音调），蓝色字体为 MCS 数据速率。 希望我的解释能让你明白。 顺祝商祺！ Christine。 Re: Is this able to OFDMA TF-Files of Rewrite? 你好，@kazus 请允许我向电台的同事确认一下。 一旦确认，我会通知你们。 顺祝商祺！ Christine。 Re: Is this able to OFDMA TF-Files of Rewrite? 嗨， Christine_Li 20MHz 和 40MHz 带宽以全音输出，但 80MHz 带宽似乎以 106 音输出。 此外，我还需要将费率调整为最差费率。 我该如何重写下面的文件？ 另外，请介绍一下 40MHz 和 80MHz。 ＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝ OFDMA_20MHz.txt FRAME_CTRL_TYPE=1\\ IEEE_TYPE_CTRL_TYPE=2\\ TRIGGER \\配置持续时间字段 \ 最大持续时间 FRAME_DURATION=5484\0x156C \\ 配置触发器帧的公共信息字段\\ HE_Trigger_Frame.triggerField.triggerType = BASIC_TRIGGER； \\ HE_Trigger_Frame.triggerField.ULLEN = 1000；\\ Max\ He_Trigger_Frame.triggerField.csRequired = 1000；\\ Max\ He_trigger_Frame.triggerField.csRequired = 1000； \\ Max \ He_trigger_Frame._frame.trigcommonfield.ULBW = TB_BW_20MHZ；\\ HE_Trigger_Frame.trigcommonfield.LTFTYPE = LTF_1_GI_1_6US；\\ HE_Trigger_Frame.trigcommonfield.LTFSYMBOL = 0；\\ HE_Trigger_Frame.trigcommonfield.LTFSYMBOL = 0；\\ HE_Trigger_Frame.trigcommonfield. trigger_frame.trigcommonfield.ulstBC = FALSE； \\ HE_Trigger_frame.trigcommonfield.ldpcess = TRIGGER_FRAME.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigcommonfield.aptxpwr = 0\\ HE_\ he_trigger_frame.trigcommonfield.spatialReuse = 65535； \\ HE_Trigger_Frame.trigcommonfield.doppler = FALSE；\\ He_trigger_frame.trigger_frame.trigger_frame.trigcommonfiel TrigCommonField=0;1000;0;0;0;1;0;0;0;1;0;1;0;65535;0;511 \\ 配置触发帧的用户信息字段\\ he_trigger_Frame.triguserInfoeld.aid12 = (5 & 0xFFF)； \\ He_trigger_frame.triguserInfoeld.ruallocreg = 0；\\ He_trigger_Frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_frame.trigger_framfield.ulcodingType = CODING_TYPE_LDPC； \\ HE_Trigger_Frame.triguserInfoeld.ulmcs = 0；\\ HE_Trigger_Frame.trigserInfoild.uldCM = FRAME； \\ HE_Trigger_Frame.triger_frame.triger_frame.triger_frame.triger_frame.triger_frame.triger_frame.trigser UltargetRSSI = 80； TrigUserInfoField=5;0;61;1;0;0;0;80 \\ 配置触发器相关用户信息字段\\ HE_Trigger_Frame.basicTriguserinfo.mpdu_mu_sf = MPDU_SPACING_MULT_1； \\ He_trigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frame.basicTrigger_Frinfo.pref_ac = TB_AC_VO；basicTriguserInfo=0；0；0；0；0 Re: Is this able to OFDMA TF-Files of Rewrite? 你好，@kazus 您在使用我们的 IW611 吗？ 您可以参考本节内容编辑配置文件： 13.3 编辑 UM11749中的配置文件。 顺祝商祺！ Christine。

リンカーはリファレンスマニュアルに書かれているようにVLE関数間のギャップを圧縮しません。 「CodeWarrior Development Studio for Power Architecture ®プロセッサ ビルド ツール リファレンス」には次のように記載されています。 -func_align   実行可能コード内の関数の配置を指定します。   構文 -func_align 4 | 8 | 16 | 32 | 64 | 128   備考 デフォルトの配置は 4 です。ただし、最適化レベル 4 では、アライメントは 16 に変わります。-func_align 4 (またはなし) を使用しており、VLE 用にコンパイルしている場合、リンカーは VLE 関数間のギャップを圧縮します。 • これらの関数がClassic PPC関数によって呼び出されない場合 • 関数のアライメントは 4 より大きい。 注:ギャップの圧縮は、CodeWarrior コンパイラによってコンパイルされたファイルでのみ行われます。 ------------------------ 質問: 1.ここに矛盾はありませんか、それともこれをどのように理解すべきでしょうか? 「-func_align 4 (またはなし) を使用しており、VLE 用にコンパイルしている場合、リンカーは VLE 関数間のギャップを圧縮します。」   「• 関数のアライメントは 4 より大きいです。」 2. 「クラシックPPC機能」とは何ですか？ 3. 関数間にまだギャップ「00 00」があるのはなぜですか。VLE コードをコンパイルし、Codewarrior プロジェクト設定の「関数のアライメント」(コード生成 -> EPPC プロセッサ) が「4 バイト」に設定されています (添付ファイルを確認してください)。     Re: Linker does not compress gaps between VLE functions like Reference Manual say FORCEFILES { "module.o"} 何らかの理由で、リンク元に約束を忘れる権利が与えられます。同じ問題が発生する場合は、モジュール名を削除してください。 Re: Linker does not compress gaps between VLE functions like Reference Manual say UPD1: 空のプロジェクトを作成し、サンプル関数を入力しましたが、このプロジェクトでは関数間にギャップは生成されません。私はこれで遊んでいます Re: Linker does not compress gaps between VLE functions like Reference Manual say ...添付ファイル...

LX2080 LX2080のセキュアブートモードをハードウェアとソフトウェアで無効にする方法 Re: LX2080 LX2080C A 72232B の場合、 LX2160 のデータシート で「A」の「SEC 無効、SEC セキュアブートを含む」 と確認できます 。セキュアブートが有効になっているかどうかは、どのようにして確認するのですか？   よろしくお願いします。   Re: LX2080 LX2080CA72232B よろしくお願いします。 Re: LX2080 LX2080 の部品番号をお知らせください。 よろしくお願いします。