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Target Reset Pattern Hello,all Can the I3C module of the LPC55xx family of chips send a "Target Reset Pattern" through a configuration register?Whether the T-bit of the I3C command is automatically calculated by the hardware or can be configured by software. LPC55xx Re: Target Reset Pattern Hi @lb_h  In the LPC55xx family, the I3C module does not have a dedicated configuration register to directly send the “Target Reset Pattern.” However, it supports sending custom command sequences, which can be used to generate the reset pattern manually by software. The T-bit is typically calculated automatically by the hardware based on the I3C command. BR Harry
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error in installing extension version:S32DS for S32 Platform 3.4 When I install the extension"S32SDK S32K1XX RTM4.0.3"online,it says"Operation detailsSoftware being installed: com.nxp.s32ds.s32k1.dev.feature.feature.group 1.0.0.202106101451 Missing requirement: com.nxp.s32ds.s32k1.dev.feature.feature.group 1.0.0.202106101451 requires 'org.eclipse.equinox.p2.iu; com.nxp.s32ds.cle.s32k1.s32k142w.dev.feature.feature.group [1.0.0.202106101446,1.0.0.202106101446]' but it could not be found".The screenshot is below. So I tried to install it offline, but I searched this extension in nxp.com,there is only"S32SDK S32K1XX RTM4.0.2". The extension"S32K1XX development package"is the same case. how can i solve this problem? Re: error in installing extension it is useful! thanks very much Re: error in installing extension Hi @michaelcr97 and @rereli , Sorry for the inconvenience we bring you! it is recommended to change Available S32DS Software Sites to https. This has been discussed in Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: error in installing extension Where is the red X.Is it?But i think it is a red + hahahah~ Re: error in installing extension Actually in my case, if I go to help->installation details-> and I expand S32Design Studio I will find that eclipse requirments market with a red "x", seems those were not installed. I attached a picture: Re: error in installing extension I will send an email to nxp.If i get reply, i will update here. Re: error in installing extension unfortunately it didn`t worked to install it offline too Re: error in installing extension I`m trying to install those extensions offline, I will come up with updates here if I will succeed. Re: error in installing extension Yes,actually,i can't install every extension online in this tab. Re: error in installing extension Hello, I get the same error when I try to install a different development package than yours, but from the same tab.
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RT1052 使用 Flexspi 接口 您好,先生: 想确认一下RT1052芯片的Flexspi接口的使用方法: 1.我需要使用Flexspi接口与两个设备进行通信,分别是NOR Flash和FPGA,分别对应FlexspiA接口和FlexspiB接口,均采用4线通信模式; 2.系统开机后,我需要同时访问两个设备。这可以吗?具体来说,当我使用 FLASH 时,我是否可以读取和写入 FPgas? 3.具体来说,与FPGA的通信是常规的2ms通信,但是FLASH的操作需要很长时间,是否会影响与FPGA的通信周期? 4.有没有更好的方案推荐? 谢谢你! 启动 ROM | 启动配置 | 闪存 通信与控制(I3C | I2C | SPI | FlexCAN | 以太网 | FlexIO) 回复:RT1052 Flexspi 接口的使用 嗨,哈利 您是说 RT1052 有两个 FlexSPI 控制器吗? NOR Flash运行时如何理解硬件被占用?访问 FPGA 有延迟吗?我在使用的时候FlexSPI_A接口的信号是接FLASH的,FlexSPI_B是接FPGA设备的。 您的意思是FlexSPI_A和FlexSPI_B使用两个FlexSPI控制器完全独立地控制两个FlexSPI接口吗?在哪里可以获得配置两个具有完全独立控制的 FlexSPI 接口的示例? 谢谢! 嘉信
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S32K146料金の問題 こんにちは、チーム。現在、S32K146を使用してプロジェクトを開発しています。EB tresos を使用して FEE モジュールを設定しているときに、いくつかの問題が発生しました。何か答えや提案をいただけますか? 画像に示すように、 Fee Block Size とFee Virtual Page Sizeの関係は何ですか? Fee Virtual Page Sizeを8または32に設定すると、Fee Block Sizeが32以下の場合にのみ、Fee_Read()関数を使用して目的のデータを取得できます。たとえば、[ Fee Block Size ] を 64 (32 より大きい値) に設定し、[Fee Virtual Page Size ] を 32 に設定すると、D-Flash にデータを書き込むことができず、したがってデータを読み取ることができません。Fee Block Sizeを200に設定したい場合、どうすればよいですか? ご回答ありがとうございます。ご協力いただきありがとうございます。 Re:S32K146料金の問題 こんにちは、ルーカス.今、私はそれが書き終わるのを待たずに直接それを読み上げたので、FEE機能を実現することができます。あなたのアドバイスはとても役に立ちます。感謝! Re:S32K146料金の問題 こんにちは、ルーカス!お返事ありがとうございます、 スクリーンショットに示すように、公式の例で提供されている読み取りおよび書き込み関数をコピーして、プロジェクトで使用しました。S32K146 の 1 セクターのサイズは 0x1000 です。「Fee Block Size」はユーザーが定義したブロックサイズであり、その最大値は0x1000未満であるべきだと理解できますか?これは私の関数呼び出しのスクリーンショットです:
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此 FreeRTOS 堆使用情况显示是否表明存在损坏? 这是一个奇怪的问题,但是调试器的 FreeRTOS 的“堆使用情况”选项卡的附加快照是否表明数据损坏? 我认为它通常显示绿色区域代表正在运行的固件所使用的区域,白色区域代表空闲/未分配的区域。在我的图像中,您可以看到我预期为白色的大区域实际上是浅绿色。 我知道这听起来很傻,但我曾经看到调试器选项卡在溢出/数据损坏期间做出奇怪的报告。我以前从未在那里见过浅绿色。这是否仅仅表明我的堆快用完了? 回复:此 FreeRTOS 堆使用情况显示是否表明存在损坏? 你好 不,颜色并不表示数据损坏,它看起来像是 IDE 视图上的一个错误。 此视图仅显示堆上的已用空间和可用空间。 此致, 奥马尔
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S32K146 FEE ISSUE Hello, team. I'm currently developing a project using S32K146. I encountered some issues while configuring the FEE module using EB tresos. Could you please provide some answers or suggestions? As shown in the image, what is the relationship between Fee Block Size and Fee Virtual Page Size? When I configure the Fee Virtual Page Size to either 8 or 32, I can only retrieve the desired data through the Fee_Read() function when the Fee Block Size is less than or equal to 32. For example, if I set the Fee Block Size to 64 (a value greater than 32) and Fee Virtual Page Size to 32, I cannot write data to the D-flash, and consequently, I cannot read the data. If I want to set the Fee Block Size to 200, what should I do? Thank you for your responses. I appreciate your help. Re: S32K146 FEE ISSUE Hi,Lukas.Now I can realize the FEE function because I read it out directly without waiting for it to finish writing. Your advice is very helpful. Thanks! Re: S32K146 FEE ISSUE I did quick test on my side and I can use also large block like 64 bytes. And I'm reading back correct data. Maybe you can try it directly in the RTD example and then check the differences in your project. The sector size is not the real maximum of Fee Block. It's smaller because there's also some overhead. The configurator checks it, it won't allow you to configure too big size. In the original RTD example, it allows me to set max 832 bytes. If you configure more, you will get error message like this: Regards, Lukas Re: S32K146 FEE ISSUE HI,Lukas! Thank you for you reply,    I copied the read and write functions provided by the official example and used them in my project, as shown in your screenshot. The size of one sector in S32K146 is 0x1000. Can I understand it this way: The "Fee Block Size" is a block size defined by the user, and its maximum value should be less than 0x1000? This is a screenshot of my function call: Re: S32K146 FEE ISSUE Hi @shiqi_seventeen  Fee Block Size is a size of user data block. You can use more blocks and the blocks can have different sizes. Max size is theoretically 65535 but it's limited by real size of flash sector. Fee Block Size is not dependent on Fee Virtual Page Size. Fee Virtual Page Size should be aligned to the real flash page size which is 8 bytes in this case. Both 8 bytes or 32 bytes can be set. How do you call the write function? Do you call Main functions after the Fee_Write()? This is a screenshot from Fee example available in RTD package: Regards, Lukas
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Use of the Flexspi interface for the RT1052 Hi,sir I would like to confirm the usage of Flexspi interface of RT1052 chip: 1. I need to use Flexspi interface to communicate with two devices, namely NOR Flash and FPGA, which correspond to FlexspiA interface and FlexspiB interface respectively, and both use 4-wire communication mode; 2. After the system is powered on, I need to access two devices at the same time. Is this allowed? Specifically, when I am working with FLASH, am I allowed to read and write FPgas? 3.in particular, the communication with the FPGA is a regular 2ms communication, but the operation of FLASH takes a long time, will it affect the communication cycle with the FPGA? 4. Is there a better plan to recommend? Thank you! Boot ROM|Booting | Flash Communication & Control(I3C | I2C | SPI | FlexCAN | Ethernet | FlexIO) Re: Use of the Flexspi interface for the RT1052 Hi 1. Yes, you are right. 2. In a FreeRTOS-based system, if you have two tasks with different priorities accessing devices on the same FlexSPI bus, I think you should use FreeRTOS synchronization mechanisms (e.g., mutexes) to protect access to shared resources like the FlexSPI bus. If the high-priority task has strict real-time requirements, consider limiting the frequency or duration of FlexSPI accesses by the low-priority task. BR Harry Re: Use of the Flexspi interface for the RT1052 Hi,Harry 1、If we plan to use the RT1052, it has a FlexSPI controller, as shown in the attached figure, still can't access the FPGA when reading and writing FLASH? Can't access independently, must need to wait for the end of the access to the other side of the data? 2、If two tasks with different priorities are set to access two devices, the priority of the task with high real-time requirements is set to high. What should be paid attention to in this case?   Thank you! jiaxin Re: Use of the Flexspi interface for the RT1052 Hi @jiaxin  1. I just checked the IMXRT1052 data sheet. Unfortunately, it only has one Flexspi controler. 2. "How do I understand that hardware is occupied during NOR Flash operation? Delay in accessing the FPGA? When I use it, the signal of FlexSPI_A interface is connected to FLASH, and FlexSPI_B is connected to FPGA device." What I mean is that if FlexSPI is accessing Flash, it cannot access FPGA at the same time. 3. Do you mean FlexSPI_A and FlexSPI_B by using two FlexSPI controllers to control two FlexSPI interfaces completely independently? No, if the IMXRT1052 has two Flexspi controlers. FlexSPI1_A can control NOR FLASH. FlexSPI2_A can control FPGA, they are independent. BR Harry Re: Use of the Flexspi interface for the RT1052 Hi,Harry Are you saying that the RT1052 has two FlexSPI controllers? How do I understand that hardware is occupied during NOR Flash operation? Delay in accessing the FPGA? When I use it, the signal of FlexSPI_A interface is connected to FLASH, and FlexSPI_B is connected to FPGA device. Do you mean FlexSPI_A and FlexSPI_B by using two FlexSPI controllers to control two FlexSPI interfaces completely independently? Where can I get an example of configuring two FlexSPI interfaces with complete independent control? THANKS! JIAXIN Re: Use of the Flexspi interface for the RT1052 Hi @jiaxin  The FlexSPI module can access both FlexSPIA and FlexSPIB interfaces, but not at the same time. FlexSPI performs sequential access, meaning one transaction must complete before the next begins. NOR Flash operations like erasing or programming are relatively time-consuming. Erase operations, for example, can take milliseconds to complete. During this time, the FlexSPI hardware may be occupied, causing delays in accessing the FPGA. If feasible, you could two FlexSPI controllers This allows completely independent control of two FlexSPI interfaces. FLEXSPI for NOR FLASH, FLEXSPI2 for FPGA. BR Harry
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S32K146费用问题 大家好,团队。我目前正在开发一个使用 S32K146 的项目。我在使用 EB tresos 配置 FEE 模块时遇到了一些问题。您能否提供一些答案或建议? 如图所示, Fee Block Size和F ee Virtual Page Size之间是什么关系? 当我将费用虚拟页面大小配置为 8 或 32 时,只有当费用块大小小于或等于 32 时,我才能通过 Fee_Read() 函数检索所需的数据。例如,如果我将Fee Block Size设置为 64(大于 32 的值)并将Fee Virtual Page Size设置为 32,则我无法将数据写入 D-flash,因此也无法读取数据。如果我想将费用块大小设置为 200,我该怎么做? 感谢您的回复。感谢您的帮助。 回复:S32K146费用问题 嗨,Lukas。现在我可以实现 FEE 功能了,因为我可以直接读出来而不需要等待它写完。你的建议很有帮助。谢谢! 回复:S32K146费用问题 你好,卢卡斯!谢谢你的回复, 我复制了官方例子提供的读写函数到我的项目中使用,如你的截图所示。S32K146中一个扇区的大小为0x1000。我可以这样理解吗:“Fee Block Size”是用户定义的块大小,其最大值应小于0x1000?这是我的函数调用截图:
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RT1052のFlexspiインターフェースの使用 こんにちは、先生 RT1052チップのFlexspiインターフェースの使用方法を確認したいのですが。 1.Flexspiインターフェイスを使用して、NORフラッシュとFPGAの2つのデバイスと通信する必要があり、これらはそれぞれFlexspiAインターフェイスとFlexspiBインターフェイスに対応し、どちらも4線式通信モードを使用します。 2.システムの電源が入った後、2つのデバイスに同時にアクセスする必要があります。これは許可されていますか?具体的には、FLASHで作業しているとき、FPgasの読み書きは許可されていますか? 3.in 特に、FPGAとの通信は通常の2ms通信ですが、FLASHの動作には時間がかかりますが、FPGAとの通信周期に影響はありますか? 4.お勧めのより良いプランはありますか? ありがとうございます! ブートROM|ブート|フラッシュ 通信&制御(I3C |I2Cの |SPIの |フレックスキャン |イーサネット |FlexIOの) Re:RT1052のFlexspiインターフェースの使用 こんにちは、ハリー RT1052にはFlexSPIコントローラーが2つあるということですか? NORフラッシュの動作中にハードウェアが占有されていることをどのように理解しますか?FPGAへのアクセスが遅れていますか?私が使用すると、FlexSPI_Aインターフェースの信号がFLASHに接続され、FlexSPI_B FPGAデバイスに接続されます。 2つのFlexSPIコントローラを使用して、2つのFlexSPIインターフェースを完全に独立して制御することで、FlexSPI_AとFlexSPI_Bを行うということですか?2 つの FlexSPI インターフェイスを完全に独立して制御する設定の例はどこで入手できますか。 感謝! ジアシン
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この FreeRTOS のヒープ使用量の表示は破損を示唆していますか? 奇妙な質問ですが、デバッガーの FreeRTOS の [ヒープ使用量] タブの添付されたスナップショットは、データの破損を示唆していますか? 通常、実行中のファームウェアで使用されているものを表す緑色の領域と、空いている/割り当てられていない白い領域が表示されていると思います。私の画像では、白であると思っていた大きな領域が、代わりに薄緑色になっていることがわかります。 ばかげているように聞こえることはわかっていますが、過去にオーバーフロー/データ破損中にデバッガータブが奇妙に報告されるのを見たことがあります。あそこにはライトグリーンの色は見たことがありません。それは単に、ヒープが不足に近づいていることを示していますか? Re: この FreeRTOS ヒープ使用量の表示は破損を示唆していますか? こんにちは いいえ、色はデータの破損を示唆するものではなく、IDEビューのバグのようです。 このビューには、ヒープ上の使用済みスペースと使用可能なスペースのみが表示されます。 よろしくお願いいたします オマル
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How to explain the MC33665 TPL2 Message I‘m learning the MC33665 datasheet .in "5.2.3"TPL2 protocol , the message lenght is 48bit,however the second 16bit data is larger than 16bit.how can i understund it  i mean MS =1bit, RADD=7bit, MADD=1bit,CADD=3bit,DADD=6bit, total is 18bit,that is larger than 16bit ? Re: How to explain the MC33665 TPL2 Message Hi, The AN13281 is classified as a secure file requiring an NDA. You can download it directly from: https://www.nxp.com/webapp/sd/collateral/1644500428545720962128?version=0.1 or from: https://www.nxp.com/mynxp/secure-files In case of any problems with your secure access rights, please contact support. BRs, Tomas Re: How to explain the MC33665 TPL2 Message where can i get AN13281.my security access goes wrong. it‘s not working after i got the MC33665A-datasheet Re: How to explain the MC33665 TPL2 Message Hi, Please have a look at our AN13281 - that describes the TPL2 message frame in detail and provides other useful information. BRs, Tomas
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IMX8Mplus LPDDR4 EVKでCSI2-MIPIインターフェースを使用したい IMX8Mplus LPDDR4 EVKを使用しており、IMXLXYOCTOUG v.LF6.1.55_2.2.0BSPバージョンをビルドしています。 CSI2-MIPI interface.it の使用方法が検出されません。どのような設定が必要ですか? ov5640カメラを使用していますが、このカメラをCSI1-MIPIインターフェースに接続すると、カメラが機能します。 CSI2-MIPI インターフェイスに接続していると、機能していません。その理由は何ですか?どなたかご存知の方がいらっしゃいましたら、助けてください。 ありがとう&よろしく スリニヴァス Re: imx8mplus lpddr4 evk で csi2-mipi インターフェイスを使用したい 0v5640カメラセンサーをCSI2-MIPIインターフェースに接続しています Re: imx8mplus lpddr4 evk で csi2-mipi インターフェイスを使用したい 私のfdtfile = imx8mp-evk.dtb 「FATLS MMC 1:1」実行後 それはたくさんのDTBファイルを提供します。「imx8mp-evk-basler-ov5640.dtb」または「imx8mp-evk-os08a20-ov5640.dtb」のどちらであるか説明していただけますか?ファイルが読み取られるかどうか。ubootファイルでfdtfile=imx8mp-evk-basler-ov5640.dtbを変更する必要がありますか。 Re: imx8mplus lpddr4 evk で csi2-mipi インターフェイスを使用したい DTBファイルの意味を設定し、変数fdtfileをfdtfile=imx8mp-evk.dtbに指定したファイル名に変更します。それは正しいですか?ubootファイルを添付しました。 ありがとうとよろしくお願いします スリニバス Re: imx8mplus lpddr4 evk で csi2-mipi インターフェイスを使用したい こんにちはスリニヴァス、 最初に、デバイス・ツリーの CSI2-MIPI ノードを確認できます。 ov5640 カメラに CSI2-MIPI 用のノードがあり、状態が [ok] に設定されているかどうかを確認します。 ov5640 カメラの CSI2-MAPI にノードがない場合は、CSI1-MAPI のノードに基づいてノードを作成してみてください。 よろしくお願いします。 キンバリー・カルバハル 組み込みソフトウェアエンジニア - RidgeRun お問い合わせ:support@ridgerun.com 開発者 Wiki: https://developer.ridgerun.com ウェブサイト: www.ridgerun.com
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S32k311 Flash programmer Hello everyone, I am using S32 Design Studio for S32 Platform Version: 3.5 and I am trying to flash a program through S32 Flash programmer icon but it is not enabled. I only Flash a program using a debug icon. If anyone knows how to enable the S32 Flash Programmer, I appreciate it. Regards, Alvaro  S32 SDK for Power Architecture® S32 SDK for S32K1 S32 SDK for S32V Re: S32k311 Flash programmer Hi Alvaro, S32K is not in the list of Supported target devices. Please read S32_Flash_Tool_Release_Notes.pdf or S32_Flash_Tool_User_Guide.pdf (C:\NXP\S32DS.3.5\S32DS\tools\S32FlashTool\doc) Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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Does this FreeRTOS Heap Usage display suggest corruption? It's an odd question, but does the attached snapshot of the debugger's FreeRTOS' Heap Usage tab suggest data corruption?  I think it normally shows green areas representing those that are being used by the running firmware, and white areas that are free/unallocated.  In my image, you can see the big area that I would expect to be white is instead light green. I know it sounds silly, but I've seen the debugger tabs report oddly in the past during an overflow/data corruption.  I've never seen a light green color there before.  Is it merely and indication that I'm closer to running out of heap? Re: Does this FreeRTOS Heap Usage display suggest corruption? Hello No, the color does not suggest data corruption, it seems like a bug on the IDE view.  This view only shows used and available space on heap.  Best regards, Omar
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i.MX93 TMU errata ERR052243 I've found this patch on linux-imx GitHub repository, containing an iMX93 TMU workaround for ERR052243 However I cannot find the ERR052243 itself on NXP site, does anybody knows where to find it or has any additional reference on this errata? Kind Regards, Andrea Re: i.MX93 TMU errata ERR052243 Hello, Has this errata ever been documented? Thanks, Frank Re: i.MX93 TMU errata ERR052243 Hi, @andreascian! I don't have an expected day but our team is working on the document to release it as soon as possible. Best Regards! Chavira Re: i.MX93 TMU errata ERR052243 @Chavira thanks for the confirm do you have any expected publication date for this new errata document? Re: i.MX93 TMU errata ERR052243 Hi, @andreascian! Thank you for contacting NXP Support! The ERR052243 should be added to the next version of the errata document. Sorry for the mistake! Best Regards! Chavira
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i.MX6 CAAM - keyblob decryption fails after kernel upgrade Hi, We are currently upgrading a custom board from Kernel 4.1 to 5.15. We are using NXP's CAAM driver to securely store a keyblob. After updating on a security-enabled device, decryption fails. Adding some debug prints in sm_store.c yields that the job returns with JRSTA_CCBERR_ERRID_ICVCHKL If I print the status instead of just returning -EBADMSG, I get the following output:  [ 30.153764] caam_jr 2101000.jr: 2000081a: CCB: desc idx 8: AES: ICV check failed. [ 30.161259] caam_jr 2101000.jr: 2000081a: CCB: desc idx 8: AES: ICV check failed. The raw return value is 0x2000 081A, in case there is more information there.  nbsp;w Any help is highly welcome. I can of course provide more information if needed. Thanks in advance and best regards Niklas Reisser Re: i.MX6 CAAM - keyblob decryption fails after kernel upgrade Hi, thanks for the replies. We were able to find the solution in the updated kernel module which extracts the key. Kind regards, Niklas Re: i.MX6 CAAM - keyblob decryption fails after kernel upgrade The transition between kernels can introduce subtle changes in cryptographic APIs or hardware interactions that aren’t immediately apparent but have far-reaching implications, like in this case with keyblob handling and AES operations. Debugging such issues not only requires a deep understanding of the kernel internals but also a meticulous review of descriptor handling and parameter consistency. It’s impressive to see how tightly coupled cryptographic integrity checks are to kernel upgrades—almost like a puzzle where one misplaced piece can disrupt the entire system. Re: i.MX6 CAAM - keyblob decryption fails after kernel upgrade Hi, Did you use caam_keygen to generate the keyblob in bsp5.15? If not, it is recommended to use caam_keygen. Regards Harvey
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Bytes to Float not working Hello all. I am trying to convert some bytes that I receive from CAN to a float variable. However, the result is not correctly. I tried to change from little endian to big endian, not works. For example, I am receiving the data 0x40333333, it`s suposed to be 2.8, but the result is totally different. The images below will help to explain the situation (the variable that I am focusing in this example is cellParams.underVoltage😞 - variable initialiazion cellParams.underVoltage = 2.80; - initialization confirmation: So after the initialization, I will send a CAN command to change the value (I will send the same value) The new value is in the image below, from buffer position 3 until 6 When I receive the buffer, I try to do the following: int dummyInt = DeserializeInt32(&cmdMsg->data[3]); //cellParams.underVoltage = atof(&cmdMsg->data[3]); (same problem...) cellParams.underVoltage = (float)(dummyInt); static uint32_t DeserializeUint32(const uint8_t *buffer) {     int value = 0;       value += (int)buffer[3] << 24U;     value += (int)buffer[2] << 16U;     value += (int)buffer[1] << 8U;     value += (int)buffer[0];     return value; }   the returned value to dummyInt is OK: The float value, before cellParams.underVoltage = (float)(dummyInt), is: And after cellParams.underVoltage = (float)(dummyInt), is: but if I check the variable (not in memory monitor), the hex value looks fine, but the float value lookw incorrect: PS.: I tried atof, memcpy, not success. Could someone help me? Thanks in advance! Re: Bytes to Float not working Hello, thank you so much for the answer. Memcpy not worked for me, but I found another solution (thats similar to memcpy, but that`s the onlyone that worked...) static float DeserializeFloat(const uint8_t *buffer) { uint32_t value = 0;   value |= buffer[3] << 24U; value |= buffer[2] << 16U; value |= buffer[1] << 8U; value |= buffer[0]; float f = *((float*)&value); return f; }   Anyway, thank you very much for your time. Re: Bytes to Float not working Hi,  I tried it on my side and only working method for me is memcpy - like this:  unsigned int counter = 0x40333333; float f=0.0; memcpy(&f,&counter,4); 
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i want to use csi2-mipi interface in imx8mplus lpddr4 evk i am using imx8mplus lpddr4 evk, i build the IMXLXYOCTOUG v.LF6.1.55_2.2.0  bsp version. how to use the CSI2-MIPI interface.it is not detecting. what are the configurations I have to do? I am using the ov5640 camera, when I connect this camera to the CSI1-MIPI interface, the camera works. suppose I connect to the CSI2-MIPI  interface, it is not working. what is the reason? if anyone knows please help me out. Thanks &Regards Srinivas Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk i am connecting 0v5640 camera sensor to CSI2-MIPI interface Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk my fdtfile =imx8mp-evk.dtb after running "fatls mmc 1:1" it gives lots of dtb files . can you explain whether "imx8mp-evk-basler-ov5640.dtb" or "imx8mp-evk-os08a20-ov5640.dtb" files are read or not . is it required to change fdtfile=imx8mp-evk-basler-ov5640.dtb in uboot file Hit any key to stop autoboot: 0 u-boot=> u-boot=> fatls mmc 1:1 32856576 Image 58151 imx8mp-ab2.dtb 87685 imx8mp-evk-8mic-swpdm.dtb 87100 imx8mp-evk-basler-ov2775.dtb 86771 imx8mp-evk-basler-ov5640.dtb 85910 imx8mp-evk-basler.dtb 86823 imx8mp-evk-dpdk.dtb 66170 imx8mp-evk-dsp.dtb 86745 imx8mp-evk-dual-basler.dtb 86682 imx8mp-evk-dual-os08a20.dtb 86858 imx8mp-evk-dual-ov2775.dtb 86748 imx8mp-evk-ecspi-slave.dtb 86911 imx8mp-evk-flexcan2.dtb 88590 imx8mp-evk-hifiberry-dacplus.dtb 3059 imx8mp-evk-inmate.dtb 88089 imx8mp-evk-iqaudio-dacplus.dtb 88089 imx8mp-evk-iqaudio-dacpro.dtb 86963 imx8mp-evk-it6263-lvds-dual-channel.dtb 86786 imx8mp-evk-jdi-wuxga-lvds-panel.dtb 86991 imx8mp-evk-ndm.dtb 87119 imx8mp-evk-os08a20-ov5640.dtb 85973 imx8mp-evk-os08a20.dtb 87265 imx8mp-evk-ov2775-ov5640.dtb 87380 imx8mp-evk-ov2775.dtb 86911 imx8mp-evk-pcie-ep.dtb 89118 imx8mp-evk-revA3-8mic-revE.dtb 87446 imx8mp-evk-rm67191.dtb 87419 imx8mp-evk-rm67199.dtb 87895 imx8mp-evk-root.dtb 66874 imx8mp-evk-rpmsg-lpv.dtb 66898 imx8mp-evk-rpmsg.dtb 66247 imx8mp-evk-sof-pdm.dtb 66580 imx8mp-evk-sof-wm8960.dtb 86163 imx8mp-evk-spdif-lb.dtb 88743 imx8mp-evk-usdhc1-m2.dtb 86805 imx8mp-evk.dtb 8528 imx8mp_m7_TCM_hello_world.bin 139272 imx8mp_m7_TCM_low_power_wakeword.bin 20704 imx8mp_m7_TCM_rpmsg_lite_pingpong_rtos_linux_remote.bin 20096 imx8mp_m7_TCM_rpmsg_lite_str_echo_rtos.bin 56556 imx8mp_m7_TCM_sai_low_power_audio.bin 574328 tee.bin System Volume Information/ 56 .dropbox.device 43 file(s), 1 dir(s) Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk my fdtfile =imx8mp-evk.dtb after running "fatls mmc 1:1" it gives lots of dtb files . can you explain whether "imx8mp-evk-basler-ov5640.dtb" or "imx8mp-evk-os08a20-ov5640.dtb" files are read or not . is it required to change fdtfile=imx8mp-evk-basler-ov5640.dtb in uboot file . Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk Hi @srinivas_123! Yes, that is correct.   You can check the device trees saved on the memory using the next commands: "fatls mmc 1:1" for SD card boot "fatls mmc 2:1" for MMC boot Best Regards! Chavira                         Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk set the dtb file means , change  variable fdtfile with file name  you given   fdtfile=imx8mp-evk.dtb .is it correct ?. i attached the uboot file . thanks and Regards srinivas Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk Hi @srinivas_123! Thank you for contacting NXP Support!   For iMX8MP you should set the device tree called "imx8mp-evk-basler-ov5640.dtb" or "imx8mp-evk-os08a20-ov5640.dtb" https://www.nxp.com/docs/en/release-note/IMX_LINUX_RELEASE_NOTES.pdf Best Regards! Chavira Re: i want to use csi2-mipi interface in imx8mplus lpddr4 evk Hi Srinivas, You could first check the CSI2-MIPI node in the device-tree. Check if there is a node for the ov5640 camera for the CSI2-MIPI and the state is set to "okay". If the ov5640 camera does not have a node in the CSI2-MIPI you can try create it based on the node for the CSI1-MIPI. Regards, Kimberly Carvajal Embedded SW Engineer at RidgeRun Contact us: support@ridgerun.com Developers wiki: https://developer.ridgerun.com Website: www.ridgerun.com
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我想在 imx8mplus lpddr4 evk 中使用 csi2-mipi 接口 我正在使用 imx8mplus lpddr4 evk,我构建了 IMXLXYOCTOUG v.LF6.1.55_2.2.0 bsp 版本。 如何使用CSI2-MIPI接口。它没有检测。我必须做哪些配置? 我正在使用ov5640相机,当我将此相机连接到CSI1-MIPI接口时,相机就可以工作了。 假设我连接到CSI2-MIPI接口,它不起作用。原因是什么?如果有人知道,请帮助我。 谢谢与问候 斯里尼瓦斯 回复:我想在 imx8mplus lpddr4 evk 中使用 csi2-mipi 接口 我正在将 0v5640 摄像头传感器连接到 CSI2-MIPI 接口 回复:我想在 imx8mplus lpddr4 evk 中使用 csi2-mipi 接口 我的 fdtfile =imx8mp-evk.dtb 运行“fatls mmc 1:1”后 它提供了许多 dtb 文件。你能解释一下“imx8mp-evk-basler-ov5640.dtb”还是“imx8mp-evk-os08a20-ov5640.dtb”吗?文件是否被读取。是否需要在 uboot 文件中更改 fdtfile=imx8mp-evk-basler-ov5640.dtb 。 回复:我想在 imx8mplus lpddr4 evk 中使用 csi2-mipi 接口 设置 dtb 文件意味着,用给定的文件名fdtfile=imx8mp-evk.dtb更改变量fdtfile 。对吗?我附加了 uboot 文件。 谢谢并问候 斯里尼瓦斯 回复:我想在 imx8mplus lpddr4 evk 中使用 csi2-mipi 接口 你好, Srinivas, 您可以先检查设备树中的 CSI2-MIPI 节点。检查 CSI2-MIPI 对应的 ov5640 摄像头节点是否存在,并且状态是否设置为“okay”。 如果 ov5640 摄像头在 CSI2-MIPI 中没有节点,您可以尝试基于 CSI1-MIPI 的节点创建它。 此致, 金伯利·卡瓦哈尔 RidgeRun 嵌入式软件工程师 联系我们:support@ridgerun.com 开发者维基: https://developer.ridgerun.com 网站: www.ridgerun.com
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Write operation for internal flash in mcxa153 is not working Hi, i want to use internal flash memory on mcxa-153 frdm development board, i went through the sdk example of flashiap in mcuxpresso ide , to know how to write or read from flash, but those API functions provided in example only works for read operation, any attempt to write to flash throws an bus fault. below functions didnt work for me :- FLASH_API->flash_erase_sector(&s_flashDriver, destAdrss, pflashSectorSize, kFLASH_ApiEraseKey); FLASH_API->flash_program_page(&s_flashDriver, destAdrss, (uint8_t *)s_buffer, sizeof(s_buffer)); but any functions that attempts only to read flash is working fine like example:- flash_verify_erase_sector(&s_flashDriver, destAdrss, pflashSectorSize); FLASH_API->flash_verify_program(&s_flashDriver, destAdrss, sizeof(s_buffer), (const uint8_t *)s_buffer, &failedAddress, &failedData); FLASH_API->flash_get_property(&s_flashDriver, kFLASH_PropertyPflashSectorSize, &pflashSectorSize); destAdrss given here is last second sector address and block base address is 0x00 :- #define SECTOR_INDEX_FROM_END 2U destAdrss = pflashBlockBase + (pflashTotalSize - (SECTOR_INDEX_FROM_END * pflashSectorSize)); Can i please know if am missing something or using these functions wrongly?. Thank You Boot ROM|Booting | Flash MCXA Re: Write operation for internal flash in mcxa153 is not working Thanks for the solution, It solved the issue. Re: Write operation for internal flash in mcxa153 is not working Hello @Gurunath  Sorry above code is for new version SDK v2.16.0. For SDK v2.14.0, please test below code: __attribute__ ((weak)) void SystemInit (void) {   SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */ #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */ #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */   SCB->NSACR |= ((3UL << 0) | (3UL << 10)); /* enable CP0, CP1, CP10, CP11 Non-secure Access */   #if defined(__MCUXPRESSO) extern void(*const g_pfnVectors[]) (void); SCB->VTOR = (uint32_t) &g_pfnVectors; #else extern void *__Vectors; SCB->VTOR = (uint32_t) &__Vectors; #endif /* Enable the LPCAC */ SYSCON->LPCAC_CTRL |= SYSCON_LPCAC_CTRL_LPCAC_MEM_REQ_MASK; SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;   /* Enable flash RWX when FLASH_ACL in IFR0 is invalid */ if ((*((volatile const uint32_t *)(0x1000000)) == 0xFFFFFFFFU) || ((*((volatile const uint32_t *)(0x1000000)) == 0x59630000U) && (*((volatile const uint32_t *)(0x1000040)) == 0xFFFFFFFFU) && (*((volatile const uint32_t *)(0x1000044)) == 0xFFFFFFFFU))) { /* Enable MBC register written with GLIKEY index15 */ GLIKEY0->CTRL_0 = 0x00060000U; GLIKEY0->CTRL_0 = 0x0002000FU; GLIKEY0->CTRL_0 = 0x0001000FU; GLIKEY0->CTRL_1 = 0x00290000U; GLIKEY0->CTRL_0 = 0x0002000FU; GLIKEY0->CTRL_1 = 0x00280000U; GLIKEY0->CTRL_0 = 0x0000000FU;   /* Enable RWX for GLBAC0 */ MBC0->MBC0_MEMN_GLBAC[0] = 0x7700U;   /* Use GLBAC0 for all flash block */ // for (uint8_t i = 0; i < 2U; i++) // { // MBC0->MBC_INDEX[0].MBC_DOM0_MEM0_BLK_CFG_W[i] = 0x00000000U; // } MBC0->MBC_DOM0[0].MBC0_DOM_MEM0_BLK_CFG_W0 = 0x00000000U; MBC0->MBC_DOM0[0].MBC0_DOM_MEM0_BLK_CFG_W1 = 0x00000000U; /* Disable MBC register written */ GLIKEY0->CTRL_0 = 0x0002000FU; } SystemInitHook(); }       BR Alice Re: Write operation for internal flash in mcxa153 is not working Hi Alice, Thanks for clearing my doubt, i tried modifying system_init(), as you said but am getiing an error as mentioned below: /device/system_MCXA153.c:98:17: error: 'MBC_Type' has no member named 'MBC_INDEX' 98 | MBC0->MBC_INDEX[0].MBC_MEMN_GLBAC[0] = 0x7700U; | ^~ ../device/system_MCXA153.c:103:21: error: 'MBC_Type' has no member named 'MBC_INDEX' 103 | MBC0->MBC_INDEX[0].MBC_DOM0_MEM0_BLK_CFG_W[i] = 0x00000000U; can you please help me with this? Thank you Re: Write operation for internal flash in mcxa153 is not working Hello @Gurunath  This is because in the default state after booting, the flash is protected by the ROM using the MBC and no erase/write operations are allowed. There are two ways to solve this: Modify the CMPA to configure the default MBC setting as mentioned in the example's readme. Configure the MBC in the application code, please refer to below code, this has been integrated in new SDK and will be released in next version. __attribute__ ((weak)) void SystemInit (void) { SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */ #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */ #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ SCB->NSACR |= ((3UL << 0) | (3UL << 10)); /* enable CP0, CP1, CP10, CP11 Non-secure Access */ #if defined(__MCUXPRESSO) extern void(*const g_pfnVectors[]) (void); SCB->VTOR = (uint32_t) &g_pfnVectors; #else extern void *__Vectors; SCB->VTOR = (uint32_t) &__Vectors; #endif /* Enable the LPCAC */ SYSCON->LPCAC_CTRL |= SYSCON_LPCAC_CTRL_LPCAC_MEM_REQ_MASK; SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK; /* Enable flash RWX when FLASH_ACL in IFR0 is invalid */ if ((*((volatile const uint32_t *)(0x1000000)) == 0xFFFFFFFFU) || ((*((volatile const uint32_t *)(0x1000000)) == 0x59630000U) && (*((volatile const uint32_t *)(0x1000040)) == 0xFFFFFFFFU) && (*((volatile const uint32_t *)(0x1000044)) == 0xFFFFFFFFU))) { /* Enable MBC register written with GLIKEY index15 */ GLIKEY0->CTRL_0 = 0x00060000U; GLIKEY0->CTRL_0 = 0x0002000FU; GLIKEY0->CTRL_0 = 0x0001000FU; GLIKEY0->CTRL_1 = 0x00290000U; GLIKEY0->CTRL_0 = 0x0002000FU; GLIKEY0->CTRL_1 = 0x00280000U; GLIKEY0->CTRL_0 = 0x0000000FU; /* Enable RWX for GLBAC0 */ MBC0->MBC_INDEX[0].MBC_MEMN_GLBAC[0] = 0x7700U; /* Use GLBAC0 for all flash block */ for (uint8_t i = 0; i < 2U; i++) { MBC0->MBC_INDEX[0].MBC_DOM0_MEM0_BLK_CFG_W[i] = 0x00000000U; } /* Disable MBC register written */ GLIKEY0->CTRL_0 = 0x0002000FU; } SystemInitHook(); } BR Alice Re: Write operation for internal flash in mcxa153 is not working Hi, i tried to run the example as it is without modification, but it didnt work, it gave an hard fault(bus error). this error occurs only when functions like erase_sector or program_page were called(mostly those that performs write to flash). Since in example, erase sector is being called first, execution doesnt return from function call due to this error, so the error message was not print based on return value. i have got these active faults when run, Active faults Bus Fault (BFSR) BFARVALID (7) BusFault Address Register (BFAR) valid flag PRECISERR (1) Precise data bus error Hard Fault (HFSR) FORCED (30) Indicates a forced hard fault, generated by escalation of a fault with configurable priority that cannot be handled, either because of priority or because it is disabled Re: Write operation for internal flash in mcxa153 is not working Hello @Gurunath  1) "below functions didn't work for me :" ->> Please describe more detail about how it didn't work. What the return status of "flash_program_page "? 2) Does the flashiap work well on your side? Please run it first. BR Alice
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