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Eureka on PIC CLB

Certain PIC MCUs (e.g., pic16f13145 family) have FPGA-like programmable logic called Configurable Logic Block.

The pic16f13115 I'm using has 32 cells each with a 4-input lookup table and a D flip-flop.

To learn to use the tools, today I implemented and simulated support for Charlieplexing of 6 LEDs with PWM brightness control. I used Verilog to define the circuit instead of using the logic CAD canvas.

I was pounding my head on the wall for about half my time. Slowly, I got the Verilog right, got it to synthesize (build), then got it simulating.

It is cool that the CLB programmed logic works even when the CPU is sleeping. It's perfect for safety-critical applications. Can be used, for example, to implement complex interrupt trigger logic. There is great flexibility in hooking up CLB logic to peripheral inputs and outputs. It's much more flexible than the clunkier CLC programmable logic that's been a fixture of PICs.

General

Re: Eureka on PIC CLB

That’s a really interesting use of the PIC16F13115’s CLB! Using Verilog for a 6-LED Charlieplexing setup with PWM sounds like a great way to learn the workflow, and having the logic continue operating while the CPU sleeps opens up some impressive possibilities for low-power and safety-critical designs.

Re: Eureka on PIC CLB

Hello,

It appears that the device in question belong to a different manufacturer.

Could you help us contacting your manufacturer, please

If you are interested in changing to an NXP device with a Programmable Logic Unit you can consult the LPC804

The LPC804 Programmable Logic Unit (PLU)

Best Regards