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S32K118 VLPS: I/O retention in the low power mode, plus SIRCSTEN and VLPSA queries

Hi,

We have VLPS entry and pin wake-up working on the S32K118, verified
standalone with no debugger attached: four consecutive clean sleep/wake
cycles, SMC_PMCTRL[VLPSA] clear on each, and SMC_PMSTAT confirming VLPR
immediately before each WFI. So this is not a question about VLPS
failing to work - it is about current consumption during a sleep that is
working correctly.

Setup:
MCU: S32K118, 48-pin LQFP
Board: S32K118EVB-Q048 (SCH-47530 Rev A1)
Tools: S32 Design Studio 3.6.8, GCC 11.4


Issue: GPIO output state is retained through VLPS, and a driven RGB LED
consumes current for the entire sleep.

The on-board RGB LED is connected to PTD15 (green), PTD16 (red) and PTE8
(blue) through series resistors.

What we observed:

Our application drives the RGB LED from a periodic task while running.
When the device enters VLPS, whatever level the LED pins were last driven
to is still being driven for the whole time the device is asleep. The
core is stopped, the clocks are gated, nothing in software is running -
but the LED stays lit and keeps sourcing current until the device wakes.

The effect on consumption is large. A single lit LED channel draws
several milliamps through its series resistor, which is far above the
VLPS current specified for this device and dominates the total
completely. Our first supply-current measurements at J15 showed no
meaningful drop between RUN and VLPS, and the retained LED state turned
out to be the entire reason.

The failure is silent. There is no flag, no error, and no difference in
any status register between a sleep with the LED off and a sleep with the
LED lit. The only symptom is that the low-power mode appears not to save
any power, which is easily mistaken for VLPS not being entered at all. It
cost us a significant amount of investigation time before we identified
the cause.

Questions:

(a) Is this retention of GPIO output state through VLPS the intended
behaviour of the device?

(b) Is there any configuration on S32K118 that changes it, or must the
application drive every pin to its intended sleep state before
entry?

(c) Is there recommended practice for configuring digital I/O prior to
low-power entry - in particular pull-up/pull-down settings on pins
tied to external switches or transceivers, where a retained pull
is a continuous leakage path for the duration of the sleep?

(d) Under what I/O configuration are the specified VLPS current figures
for this device measured? Without knowing that, the specified
figure cannot be compared against a measurement on a real board.

(e) Are there any pins whose retained state can affect VLPS entry
itself, or the wake-up path?

deep sleep would put the I/O into an inactive state and the LED would go off by itself, since the core is stopped and all the clocks are gated. That is not what we see - the LED
stays lit for the whole sleep at full brightness.

Please confirm whether the LED is expected to remain lit in VLPS, and if
so, whether there is any device setting that makes the output pins go
inactive on low-power entry rather than holding their last driven level.

Thanks

Re: S32K118 VLPS: I/O retention in the low power mode, plus SIRCSTEN and VLPSA queries

Hello @autouser,

a) Yes. All I/Os are retained upon entering VLPS: 

Julin_AragnM_1-1786054875339.png

b) It is up to the application to set the required pins to the intended state before entering VLPS.

c) This is application dependent. But, if you have unused pins, you can refer to HW Design Guidelines chapter 8 (unused pins). 

"For unused digital and analog pins, the pin function should be set to DISABLED by setting the correspondingPORTx_PCRn[MUX] field to 0b000.
The DISABLED function is default state for all pins not initialized.
For pins with ADC functionality software should not trigger ADC channel conversion on the channel which is multiplexed with the unused pin.”

If they are configured as inputs, they should not be left floating, pulled to either VSS or VDD externally or internally (application-dependent).

You can also refer to the S32K3 Low Power Management documentation; chapter 10 provides some HW considerations which apply to general MCU power consumption:

Julin_AragnM_2-1786055927609.png

d) Table 4.7 (Power consumption) from S32K1xx Data Sheet shows power consumption defined in the attached S32K1xx_Power_Modes_Configuration.xlsx:

Julin_AragnM_3-1786056046103.png

Last row of the attachment shows which IOs were enabled at measurement.

Also, foot note 1 mentions: "All output pins are floating, and On-chip pulldown is enabled for
all unused input pins."

e) Other than the configured wake-up pins, which will either wake the device immediately if asserted, I cannot think of ones which may affect VLPS entry/exit.

Best regards,
Julián

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