2004275_en-US

FRDM-MCXN947 - LPUART With PLL0 CLK

Hello,
I am trying to use LPUART on FRO_HF (48MHz) with baudrate 320400, but MCUs with interrupt are not able to receive all characters, so there are frequent communication failures. How is it possible to connect to LPUART a clock from PLL0 running at 150MHz? Is it necessary to configure PLL0 somehow?

Clock|Timers

MCXN

Re: FRDM-MCXN947 - LPUART With PLL0 CLK

Hi @John_Adams,

I believe this is a duplicated community post from the one seen here: UART Setup on FRDM-MCXN947 - NXP Community

In order to prevent double efforts, I will continue supporting you on the aforementioned post.

Have a nice day.

BR,
Edwin.