I am finding most of the single core cm7 projects are loading code into BOARD_SDRAM (which is large)
in multicore projects no BOARD_SDRAM is initialized and code is loaded into SRAM_DTC_cm7, though the required shared memory is initialized:
What would be the best way to combine these two memory layouts so that I might utilize the much larger BOARD_SDRAM for my code while still retaining shared memory layout between the CM7/CM4? What files need to be updated/configurations in MCUXpresso IDE, as I'm seeing most of the link/map files are auto-generated?
Thanks for the response Omar. That's not exactly what I was asking. I tried a few different memory layouts and was able to find one that was acceptable and worked after setting the XIP_BOOT_HEADER_DCD_ENABLE=1. Without that the system would hardfault and I would have to recover using the MCU Boot Utility.
I found some explanation of the flag in this application note: https://www.nxp.com/docs/en/nxp/application-notes/AN12183.pdf
Hello
I hope you are well.
You can use SDRAM to load code so CM4 fetch from there: How to move CM4 core project to SDRAM in RT1176 - NXP Community
Most of the examples use TCM as it has the best performance as it is nearer to the core.
Best regards,
Omar