Using NVM chip on MPC5775B EVB

[sonik82]

I would like to use NVM chip (M95M01-DWMN3TP/K) on DVCU5775EVM, so initially I have prepared simple model just to check chip status.

Chip is connected to SPI0 with CS1

nvm_1.PNGnvm_2.PNG

And I have used these settings for SPI blocks

nvm_5.PNG

nvm_6.PNG

Then have prepared stateflow diagram to send control commands

nvm_3.PNG

where Tx_data is control command (RDSR) from M95M01 datasheet

sonik82_0-1624177375228.png

and this command goes after chip is selected

sonik82_1-1624177630426.png

Finally I have got following model.

nvm_4.PNG

After flashing, I have used Freemaster to check SPI feedback signal from NVM and it is always 0xff.

nvm_7.PNG

[oguz]

Hi,

 I am dealing with the same problem but couldn't find the solution. Can you help me with that??

[Baris]

Dear @mariuslucianand and @sonik82 

I faced the same problem and I want to save any data in EEPROM, can you help with that?

[mariuslucianand]

Hello @sonik82 ,

I had a look at your model and attached the model with a couple of changes. I don't have access to your board and I cannot test it, but I had a look at the signals using the logic analyzer. See the image attached below.

mariuslucianand_0-1624349389909.png

1.  SPI settings - for that you can select the CS pin in the SPI_Config, you don't need to change it by hand. To select the device you can select the CS in the Master transmit block, the one you have already used.

mariuslucianand_1-1624349845093.png

mariuslucianand_2-1624350277160.png

2. In the Stateflow, you can remove the chip select state, because the DSPI will handle that, so you can only send and decode the responses from the SPI. 

mariuslucianand_3-1624350367033.png

Hope this helps,

Marius

[sonik82]

@mariuslucianand 

As per datasheet, we need to keep Chip select low while sending command and getting data from chip

sonik82_2-1624568581644.png

Your image shows that Chip Select goes High after transmitting of command, am I right?

sonik82_0-1624568237232.png

Is it possible to keep this signal Low until we will get data?

Another question, these SPI settings are correct 

sonik82_3-1624568942974.png

to provide one of following SPI modes?

sonik82_4-1624569019113.png

Also, to send 8 bits command and 24 bits address I need to change SPI frame size to 32, am I right? Then how to change this frame size dynamically? For example to Read Status Register it is required only 8 bits, to Read data 8 bits for command + 24 bits for address, to Write data 8 bits for command + 24 bits for address + Data.

Input and Output ports have same size, so does it mean that we can only send/get SPI frames with same size?

sonik82_0-1624570247904.png

[sonik82]

I have changed SPI frame size from 8 to 16 bits, assuming that Chip select will be Low enough time to read feedback (8 bits) from NVM chip.

sonik82_0-1624604328698.png

Now my SPI receive data is 0. 

sonik82_0-1624603960892.png

It looks fine for Read Status Register command, because bits 0,1,2,3,7 should not be set by default.

sonik82_1-1624604560300.png

I am going to check Read/Write commands.

[sonik82]

@mariuslucianand 

I guess if I set SPI frame size to 24 bits then in case when my command is 8 bits, expected response also 8 bit, then I will get next 8 bits as 0xFF, am I right?

[sonik82]

I guess if I set SPI frame size to 24 bits then in case when my command is 8 bits, expected response also 8 bit, then I will get next 8 bits as 0xFF, am I right?

[mariuslucianand]

Hello @sonik82 ,

You can send variable bytes number (8, 16, 24, 32, 40 ...) with a continuous CS by selecting the Continuous transfer. But I've seen that you have already done that. 

mariuslucianand_0-1624607963579.png

So, you select the frame size as 8, and you populate an array with the commands you want to send. F4irst byte is the command, then the next 3 bytes are the address. If you provide such an array to the SPI Send block, this will output on bus 4 continuous bytes, with only one chip select transition.

Hope this helps,

Marius

[sonik82]

@mariuslucianand SPI chip selection remains Low only when I am sending data to chip or it remains selected while receiving data from SPI also?

[mariuslucianand]

Hello @sonik82 ,

I think it will remain low as long as you transmit. But, if you expect to receive for example 4 bytes from the NVM chip, you can compute the array like this: [cmd, addr, addr, add, 0xFF, 0xFF, 0xFF, 0xFF] basically you send an 0xFF or 0x00 as long as you want to receive from the NVM chip. Please give this a try.

Marius

[sonik82]

Hello @mariuslucianand 

I have checked your idea. To do it, I have modified model by creation of 4 commands: 

RDSR (Read Status Register) [ 00000101 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF] 

sonik82_4-1624729396494.png

WREN (Write Enable) [ 00000110 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF]  because of

sonik82_2-1624729251596.png

WRITE (Write to Memory Array) [ 00000010 0x00 0x00 0x00 11000100 0xFF]

READ (Read from Memory Array) [ 00000011 0x00 0x00 0x00 0xFF 0xFF]

sonik82_5-1624729497228.png

When I use SPI frame size, received data is always 0xFF.

sonik82_0-1624728449115.png

Same situation with SPI frame size 16, but with using size 24 output data becomes 0x00

sonik82_3-1624729313095.png

[sonik82]

@mariuslucianand  Thank you for model modification, but, unfortunately, I am still facing same issue SPI receive signal is always 0xFF and it does not matter which command I send to NVM.

[ranulf]

@sonik82Sonic82, have you had any success yet in using the NVM chip on the MPC5775BEVB? I have tried also, with no success-so far.